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Searched refs:mmCP_CE_IB1_BASE_HI (Results 1 – 12 of 12) sorted by relevance

/linux-6.12.1/drivers/gpu/drm/amd/include/asic_reg/gca/
Dgfx_6_0_d.h372 #define mmCP_CE_IB1_BASE_HI 0x21C7 macro
Dgfx_7_2_d.h531 #define mmCP_CE_IB1_BASE_HI 0xc0c7 macro
Dgfx_7_0_d.h518 #define mmCP_CE_IB1_BASE_HI 0xc0c7 macro
Dgfx_8_0_d.h584 #define mmCP_CE_IB1_BASE_HI 0xc0c7 macro
Dgfx_8_1_d.h584 #define mmCP_CE_IB1_BASE_HI 0xc0c7 macro
/linux-6.12.1/drivers/gpu/drm/amd/include/asic_reg/gc/
Dgc_9_0_offset.h4829 #define mmCP_CE_IB1_BASE_HI … macro
Dgc_9_1_offset.h5059 #define mmCP_CE_IB1_BASE_HI … macro
Dgc_9_2_1_offset.h5015 #define mmCP_CE_IB1_BASE_HI … macro
Dgc_10_1_0_offset.h7333 #define mmCP_CE_IB1_BASE_HI … macro
Dgc_10_3_0_offset.h6966 #define mmCP_CE_IB1_BASE_HI … macro
/linux-6.12.1/drivers/gpu/drm/amd/amdgpu/
Dgfx_v9_0.c182 SOC15_REG_ENTRY_STR(GC, 0, mmCP_CE_IB1_BASE_HI),
Dgfx_v10_0.c312 SOC15_REG_ENTRY_STR(GC, 0, mmCP_CE_IB1_BASE_HI),