Home
last modified time | relevance | path

Searched refs:mmCNVC_CFG1_PRE_CSC_B_C31_C32_BASE_IDX (Results 1 – 4 of 4) sorted by relevance

/linux-6.12.1/drivers/gpu/drm/amd/include/asic_reg/dcn/
Ddcn_3_0_3_offset.h3212 #define mmCNVC_CFG1_PRE_CSC_B_C31_C32_BASE_IDX … macro
Ddcn_3_0_1_offset.h4023 #define mmCNVC_CFG1_PRE_CSC_B_C31_C32_BASE_IDX … macro
Ddcn_3_0_2_offset.h4568 #define mmCNVC_CFG1_PRE_CSC_B_C31_C32_BASE_IDX … macro
Ddcn_3_0_0_offset.h4619 #define mmCNVC_CFG1_PRE_CSC_B_C31_C32_BASE_IDX … macro