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Searched refs:mmCM1_CM_DGAM_RAMA_END_CNTL2_B_BASE_IDX (Results 1 – 4 of 4) sorted by relevance

/linux-6.12.1/drivers/gpu/drm/amd/include/asic_reg/dcn/
Ddcn_2_0_3_offset.h2134 #define mmCM1_CM_DGAM_RAMA_END_CNTL2_B_BASE_IDX … macro
Ddcn_1_0_offset.h4175 #define mmCM1_CM_DGAM_RAMA_END_CNTL2_B_BASE_IDX … macro
Ddcn_2_1_0_offset.h4089 #define mmCM1_CM_DGAM_RAMA_END_CNTL2_B_BASE_IDX … macro
Ddcn_2_0_0_offset.h5027 #define mmCM1_CM_DGAM_RAMA_END_CNTL2_B_BASE_IDX … macro