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Searched refs:mmCB_HW_CONTROL_2 (Results 1 – 12 of 12) sorted by relevance

/linux-6.12.1/drivers/gpu/drm/amd/include/asic_reg/gca/
Dgfx_6_0_d.h279 #define mmCB_HW_CONTROL_2 0x2686 macro
Dgfx_7_2_d.h140 #define mmCB_HW_CONTROL_2 0x2686 macro
Dgfx_7_0_d.h140 #define mmCB_HW_CONTROL_2 0x2686 macro
Dgfx_8_0_d.h157 #define mmCB_HW_CONTROL_2 0x2686 macro
Dgfx_8_1_d.h157 #define mmCB_HW_CONTROL_2 0x2686 macro
/linux-6.12.1/drivers/gpu/drm/amd/amdgpu/
Dgfx_v9_0.c698 SOC15_REG_GOLDEN_VALUE(GC, 0, mmCB_HW_CONTROL_2, 0x0f000000, 0x0a000000),
753 SOC15_REG_GOLDEN_VALUE(GC, 0, mmCB_HW_CONTROL_2, 0xff7fffff, 0x0a000000),
775 SOC15_REG_GOLDEN_VALUE(GC, 0, mmCB_HW_CONTROL_2, 0xff7fffff, 0x0a000000),
819 SOC15_REG_GOLDEN_VALUE(GC, 0, mmCB_HW_CONTROL_2, 0x0f000000, 0x0a000000),
Dgfx_v8_0.c311 mmCB_HW_CONTROL_2, 0x0f000000, 0x0d000000,
342 mmCB_HW_CONTROL_2, 0x0f000000, 0x0f000000,
374 mmCB_HW_CONTROL_2, 0x0f000000, 0x0f000000,
/linux-6.12.1/drivers/gpu/drm/amd/include/asic_reg/gc/
Dgc_9_0_offset.h1047 #define mmCB_HW_CONTROL_2 macro
Dgc_9_1_offset.h1017 #define mmCB_HW_CONTROL_2 macro
Dgc_9_2_1_offset.h983 #define mmCB_HW_CONTROL_2 macro
Dgc_10_1_0_offset.h2963 #define mmCB_HW_CONTROL_2 macro
Dgc_10_3_0_offset.h2930 #define mmCB_HW_CONTROL_2 macro