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Searched refs:mmCB_HW_CONTROL (Results 1 – 15 of 15) sorted by relevance

/linux-6.12.1/drivers/gpu/drm/amd/amdgpu/
Dsi.c62 mmCB_HW_CONTROL, 0x00010000, 0x00018208,
118 mmCB_HW_CONTROL, 0x00010000, 0x00018208,
301 mmCB_HW_CONTROL, 0x00010000, 0x00018208,
339 mmCB_HW_CONTROL, 0x00010000, 0x00018208,
386 mmCB_HW_CONTROL, 0x00010000, 0x00018208,
Dmxgpu_vi.c230 mmCB_HW_CONTROL, 0xfffdf3cf, 0x00007208,
Dgfx_v9_0.c675 SOC15_REG_GOLDEN_VALUE(GC, 0, mmCB_HW_CONTROL, 0x0000f000, 0x00012107),
712 SOC15_REG_GOLDEN_VALUE(GC, 0, mmCB_HW_CONTROL, 0xfffdf3cf, 0x00014104),
752 SOC15_REG_GOLDEN_VALUE(GC, 0, mmCB_HW_CONTROL, 0xfffdf3cf, 0x00014104),
774 SOC15_REG_GOLDEN_VALUE(GC, 0, mmCB_HW_CONTROL, 0xfffdf3cf, 0x00014104),
818 SOC15_REG_GOLDEN_VALUE(GC, 0, mmCB_HW_CONTROL, 0xfffdf3cf, 0x00014104),
Dgfx_v8_0.c199 mmCB_HW_CONTROL, 0xfffdf3cf, 0x00007208,
310 mmCB_HW_CONTROL, 0x0001f3cf, 0x00007208,
341 mmCB_HW_CONTROL, 0x0000f3cf, 0x00007208,
373 mmCB_HW_CONTROL, 0x0001f3cf, 0x00007208,
Dgfx_v7_0.c1969 tmp = RREG32(mmCB_HW_CONTROL) & ~0x00010000; in gfx_v7_0_constants_init()
1971 WREG32(mmCB_HW_CONTROL, tmp); in gfx_v7_0_constants_init()
/linux-6.12.1/drivers/gpu/drm/amd/include/asic_reg/gca/
Dgfx_6_0_d.h277 #define mmCB_HW_CONTROL 0x2684 macro
Dgfx_7_2_d.h138 #define mmCB_HW_CONTROL 0x2684 macro
Dgfx_7_0_d.h138 #define mmCB_HW_CONTROL 0x2684 macro
Dgfx_8_0_d.h155 #define mmCB_HW_CONTROL 0x2684 macro
Dgfx_8_1_d.h155 #define mmCB_HW_CONTROL 0x2684 macro
/linux-6.12.1/drivers/gpu/drm/amd/include/asic_reg/gc/
Dgc_9_0_offset.h1043 #define mmCB_HW_CONTROL macro
Dgc_9_1_offset.h1013 #define mmCB_HW_CONTROL macro
Dgc_9_2_1_offset.h979 #define mmCB_HW_CONTROL macro
Dgc_10_1_0_offset.h2959 #define mmCB_HW_CONTROL macro
Dgc_10_3_0_offset.h2926 #define mmCB_HW_CONTROL macro