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Searched refs:mmBL1_PWM_MINIMUM_DUTY_CYCLE (Results 1 – 8 of 8) sorted by relevance

/linux-6.12.1/drivers/gpu/drm/amd/include/asic_reg/dce/
Ddce_6_0_d.h472 #define mmBL1_PWM_MINIMUM_DUTY_CYCLE 0x162D macro
Ddce_8_0_d.h56 #define mmBL1_PWM_MINIMUM_DUTY_CYCLE 0x162d macro
Ddce_10_0_d.h56 #define mmBL1_PWM_MINIMUM_DUTY_CYCLE 0x162d macro
Ddce_11_0_d.h52 #define mmBL1_PWM_MINIMUM_DUTY_CYCLE 0x162d macro
Ddce_11_2_d.h59 #define mmBL1_PWM_MINIMUM_DUTY_CYCLE 0x162d macro
Ddce_12_0_offset.h1312 #define mmBL1_PWM_MINIMUM_DUTY_CYCLE … macro
/linux-6.12.1/drivers/gpu/drm/amd/include/asic_reg/dcn/
Ddcn_2_1_0_offset.h7145 #define mmBL1_PWM_MINIMUM_DUTY_CYCLE … macro
Ddcn_2_0_0_offset.h8176 #define mmBL1_PWM_MINIMUM_DUTY_CYCLE … macro