Home
last modified time | relevance | path

Searched refs:mmAZALIA_OUTPUT_STREAM_ARBITER_CONTROL (Results 1 – 14 of 14) sorted by relevance

/linux-6.12.1/drivers/gpu/drm/amd/include/asic_reg/dce/
Ddce_6_0_d.h434 #define mmAZALIA_OUTPUT_STREAM_ARBITER_CONTROL 0x17CD macro
Ddce_8_0_d.h5443 #define mmAZALIA_OUTPUT_STREAM_ARBITER_CONTROL 0x17cd macro
Ddce_10_0_d.h6684 #define mmAZALIA_OUTPUT_STREAM_ARBITER_CONTROL 0x17f7 macro
Ddce_11_0_d.h6846 #define mmAZALIA_OUTPUT_STREAM_ARBITER_CONTROL 0x17f7 macro
Ddce_11_2_d.h8191 #define mmAZALIA_OUTPUT_STREAM_ARBITER_CONTROL 0x17f7 macro
Ddce_12_0_offset.h1494 #define mmAZALIA_OUTPUT_STREAM_ARBITER_CONTROL … macro
/linux-6.12.1/drivers/gpu/drm/amd/include/asic_reg/dcn/
Ddcn_2_0_3_offset.h227 #define mmAZALIA_OUTPUT_STREAM_ARBITER_CONTROL … macro
Ddcn_3_0_3_offset.h1175 #define mmAZALIA_OUTPUT_STREAM_ARBITER_CONTROL … macro
Ddcn_3_0_1_offset.h1376 #define mmAZALIA_OUTPUT_STREAM_ARBITER_CONTROL … macro
Ddcn_1_0_offset.h1816 #define mmAZALIA_OUTPUT_STREAM_ARBITER_CONTROL … macro
Ddcn_2_1_0_offset.h1422 #define mmAZALIA_OUTPUT_STREAM_ARBITER_CONTROL … macro
Ddcn_3_0_2_offset.h1348 #define mmAZALIA_OUTPUT_STREAM_ARBITER_CONTROL … macro
Ddcn_2_0_0_offset.h1460 #define mmAZALIA_OUTPUT_STREAM_ARBITER_CONTROL … macro
Ddcn_3_0_0_offset.h1366 #define mmAZALIA_OUTPUT_STREAM_ARBITER_CONTROL … macro