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Searched refs:mmAZALIA_F0_CODEC_FUNCTION_CONTROL_POWER_STATE (Results 1 – 14 of 14) sorted by relevance

/linux-6.12.1/drivers/gpu/drm/amd/include/asic_reg/dce/
Ddce_6_0_d.h422 #define mmAZALIA_F0_CODEC_FUNCTION_CONTROL_POWER_STATE 0x17DB macro
Ddce_8_0_d.h5282 #define mmAZALIA_F0_CODEC_FUNCTION_CONTROL_POWER_STATE 0x17db macro
Ddce_10_0_d.h6514 #define mmAZALIA_F0_CODEC_FUNCTION_CONTROL_POWER_STATE 0x1830 macro
Ddce_11_0_d.h6676 #define mmAZALIA_F0_CODEC_FUNCTION_CONTROL_POWER_STATE 0x1830 macro
Ddce_11_2_d.h8021 #define mmAZALIA_F0_CODEC_FUNCTION_CONTROL_POWER_STATE 0x1830 macro
Ddce_12_0_offset.h1558 #define mmAZALIA_F0_CODEC_FUNCTION_CONTROL_POWER_STATE macro
/linux-6.12.1/drivers/gpu/drm/amd/include/asic_reg/dcn/
Ddcn_2_0_3_offset.h275 #define mmAZALIA_F0_CODEC_FUNCTION_CONTROL_POWER_STATE macro
Ddcn_3_0_3_offset.h1243 #define mmAZALIA_F0_CODEC_FUNCTION_CONTROL_POWER_STATE macro
Ddcn_3_0_1_offset.h1444 #define mmAZALIA_F0_CODEC_FUNCTION_CONTROL_POWER_STATE macro
Ddcn_1_0_offset.h1884 #define mmAZALIA_F0_CODEC_FUNCTION_CONTROL_POWER_STATE macro
Ddcn_2_1_0_offset.h1490 #define mmAZALIA_F0_CODEC_FUNCTION_CONTROL_POWER_STATE macro
Ddcn_3_0_2_offset.h1416 #define mmAZALIA_F0_CODEC_FUNCTION_CONTROL_POWER_STATE macro
Ddcn_2_0_0_offset.h1528 #define mmAZALIA_F0_CODEC_FUNCTION_CONTROL_POWER_STATE macro
Ddcn_3_0_0_offset.h1434 #define mmAZALIA_F0_CODEC_FUNCTION_CONTROL_POWER_STATE macro