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Searched refs:mmATC_VMID0_PASID_MAPPING (Results 1 – 17 of 17) sorted by relevance

/linux-6.12.1/drivers/gpu/drm/amd/amdgpu/
Damdgpu_amdkfd_gfx_v7.c105 WREG32(mmATC_VMID0_PASID_MAPPING + vmid, pasid_mapping); in kgd_set_pasid_vmid_mapping()
525 value = RREG32(mmATC_VMID0_PASID_MAPPING + vmid); in get_atc_vmid_pasid_mapping_info()
Damdgpu_amdkfd_gfx_v8.c100 WREG32(mmATC_VMID0_PASID_MAPPING + vmid, pasid_mapping); in kgd_set_pasid_vmid_mapping()
536 value = RREG32(mmATC_VMID0_PASID_MAPPING + vmid); in get_atc_vmid_pasid_mapping_info()
Damdgpu_amdkfd_gfx_v10.c110 pr_debug("ATHUB, reg %x\n", SOC15_REG_OFFSET(ATHUB, 0, mmATC_VMID0_PASID_MAPPING) + vmid); in kgd_set_pasid_vmid_mapping()
111 WREG32(SOC15_REG_OFFSET(ATHUB, 0, mmATC_VMID0_PASID_MAPPING) + vmid, in kgd_set_pasid_vmid_mapping()
670 value = RREG32(SOC15_REG_OFFSET(ATHUB, 0, mmATC_VMID0_PASID_MAPPING) in get_atc_vmid_pasid_mapping_info()
Damdgpu_amdkfd_gfx_v9.c120 WREG32(SOC15_REG_OFFSET(ATHUB, 0, mmATC_VMID0_PASID_MAPPING) + vmid, in kgd_gfx_v9_set_pasid_vmid_mapping()
620 value = RREG32(SOC15_REG_OFFSET(ATHUB, 0, mmATC_VMID0_PASID_MAPPING) in kgd_gfx_v9_get_atc_vmid_pasid_mapping_info()
Damdgpu_amdkfd_gfx_v10_3.c618 value = RREG32(SOC15_REG_OFFSET(ATHUB, 0, mmATC_VMID0_PASID_MAPPING) in get_atc_vmid_pasid_mapping_info_v10_3()
Dgmc_v10_0.c226 value = RREG32(SOC15_REG_OFFSET(ATHUB, 0, mmATC_VMID0_PASID_MAPPING) in gmc_v10_0_get_atc_vmid_pasid_mapping_info()
Dgmc_v7_0.c431 u32 tmp = RREG32(mmATC_VMID0_PASID_MAPPING + vmid); in gmc_v7_0_flush_gpu_tlb_pasid()
Dgmc_v8_0.c622 u32 tmp = RREG32(mmATC_VMID0_PASID_MAPPING + vmid); in gmc_v8_0_flush_gpu_tlb_pasid()
Dgmc_v9_0.c807 value = RREG32(SOC15_REG_OFFSET(ATHUB, 0, mmATC_VMID0_PASID_MAPPING) in gmc_v9_0_get_atc_vmid_pasid_mapping_info()
/linux-6.12.1/drivers/gpu/drm/amd/include/asic_reg/athub/
Dathub_1_0_offset.h48 #define mmATC_VMID0_PASID_MAPPING 0x000c macro
Dathub_2_1_0_offset.h164 #define mmATC_VMID0_PASID_MAPPING macro
Dathub_2_0_0_offset.h47 #define mmATC_VMID0_PASID_MAPPING macro
/linux-6.12.1/drivers/gpu/drm/amd/include/asic_reg/gmc/
Dgmc_7_0_d.h505 #define mmATC_VMID0_PASID_MAPPING 0xce7 macro
Dgmc_8_2_d.h557 #define mmATC_VMID0_PASID_MAPPING 0xce7 macro
Dgmc_6_0_d.h576 #define mmATC_VMID0_PASID_MAPPING 0x0CE7 macro
Dgmc_7_1_d.h537 #define mmATC_VMID0_PASID_MAPPING 0xce7 macro
Dgmc_8_1_d.h555 #define mmATC_VMID0_PASID_MAPPING 0xce7 macro