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Searched refs:mmABM1_BL1_PWM_GRP2_REG_LOCK_BASE_IDX (Results 1 – 5 of 5) sorted by relevance

/linux-6.12.1/drivers/gpu/drm/amd/include/asic_reg/dcn/
Ddcn_3_0_3_offset.h7057 #define mmABM1_BL1_PWM_GRP2_REG_LOCK_BASE_IDX … macro
Ddcn_3_0_1_offset.h11717 #define mmABM1_BL1_PWM_GRP2_REG_LOCK_BASE_IDX … macro
Ddcn_1_0_offset.h5718 #define mmABM1_BL1_PWM_GRP2_REG_LOCK_BASE_IDX … macro
Ddcn_3_0_2_offset.h14487 #define mmABM1_BL1_PWM_GRP2_REG_LOCK_BASE_IDX … macro
Ddcn_3_0_0_offset.h16113 #define mmABM1_BL1_PWM_GRP2_REG_LOCK_BASE_IDX … macro