Searched refs:misaligned (Results 1 – 25 of 32) sorted by relevance
12
| /linux-6.12.1/drivers/dma/ |
| D | pxa_dma.c | 89 bool misaligned; member
112 bool misaligned; member
450 static void phy_enable(struct pxad_phy *phy, bool misaligned) in phy_enable() argument
460 phy, phy->idx, misaligned); in phy_enable()
469 if (misaligned) in phy_enable()
512 phy_enable(chan->phy, chan->misaligned); in pxad_launch_chan()
571 to_pxad_sw_desc(vd)->misaligned) in pxad_try_hotchain()
652 chan->misaligned = in pxad_chan_handler()
809 if (chan->misaligned || !to_pxad_sw_desc(vd)->misaligned) in pxad_tx_submit()
818 chan->misaligned |= to_pxad_sw_desc(vd)->misaligned; in pxad_tx_submit()
[all …]
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| /linux-6.12.1/arch/nios2/kernel/ |
| D | Makefile | 26 obj-$(CONFIG_NIOS2_ALIGNMENT_TRAP) += misaligned.o
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| /linux-6.12.1/arch/alpha/lib/ |
| D | ev67-strlen.S | 29 ldq_u $1, 0($16) # L : load first quadword ($16 may be misaligned)
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| D | ev67-strcat.S | 35 ldq_u $1, 0($16) # L : load first quadword (a0 may be misaligned)
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| D | strlen.S | 25 ldq_u $1, 0($16) # load first quadword ($16 may be misaligned)
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| D | strcat.S | 23 ldq_u $1, 0($16) # load first quadword (a0 may be misaligned)
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| D | strncat.S | 28 ldq_u $1, 0($16) # load first quadword ($16 may be misaligned)
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| D | ev6-clear_user.S | 57 and $1, 7, $2 # .. .. E .. : number of misaligned bytes in tail
69 mskql $5, $16, $5 # .. U .. .. : take care of misaligned head
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| D | ev67-strncat.S | 37 ldq_u $1, 0($16) # L : load first quadword ($16 may be misaligned)
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| D | ev6-memcpy.S | 39 bne $1, $misaligned # U : Nope - gotta do this the slow way
181 $misaligned:
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| D | clear_user.S | 81 mskql $5, $16, $5 # e0 : take care of misaligned head
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| /linux-6.12.1/Documentation/arch/arm/ |
| D | mem_alignment.rst | 5 Too many problems popped up because of unnoticed misaligned memory access in
16 alignment trap can fixup misaligned access for the exception cases, but at
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| /linux-6.12.1/arch/m68k/ifpsp060/ |
| D | CHANGES | 86 bit 27 = 1 (misaligned bit)
108 bit 27 = 0 (misaligned bit)
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| D | isp.doc | 46 cas (w/ a misaligned effective address)
174 The instructions "cas2" and "cas" (when used with a misaligned effective
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| /linux-6.12.1/scripts/coccinelle/misc/ |
| D | cond_no_effect.cocci | 26 // /* misaligned */
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| /linux-6.12.1/Documentation/arch/riscv/ |
| D | hwprobe.rst | 247 the performance of misaligned scalar native word accesses on the selected set
251 misaligned scalar accesses is unknown.
267 accesses are not supported at all and will generate a misaligned address
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| /linux-6.12.1/Documentation/core-api/ |
| D | printk-index.rst | 50 <5> block/blk-settings.c:661 disk_stack_limits "%s: Warning: Device %s is misaligned\n"
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| /linux-6.12.1/lib/ |
| D | Kconfig.ubsan | 152 bool "Perform checking for misaligned pointer usage"
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| /linux-6.12.1/arch/arm/kernel/ |
| D | head.S | 589 THUMB( mov r6, r6, lsr #16 ) @ to be robust against misaligned r0.
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| /linux-6.12.1/Documentation/sphinx/ |
| D | kerneldoc-preamble.sty | 178 % For CJK ascii-art alignment (still misaligned for Hangul)
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| /linux-6.12.1/tools/perf/Documentation/ |
| D | perf-arm-spe.txt | 163 bit 11 - misaligned access
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| /linux-6.12.1/arch/arc/ |
| D | Kconfig | 509 This enables misaligned 16 & 32 bit memory access from user space.
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| /linux-6.12.1/arch/x86/kvm/mmu/ |
| D | mmu.c | 5900 unsigned offset, pte_size, misaligned; in detect_write_misaligned() local
5912 misaligned = (offset ^ (offset + bytes - 1)) & ~(pte_size - 1); in detect_write_misaligned()
5913 misaligned |= bytes < 4; in detect_write_misaligned()
5915 return misaligned; in detect_write_misaligned()
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| /linux-6.12.1/Documentation/scsi/ |
| D | ChangeLog.megaraid | 89 Root Cause: in uioc_t structure, one of member had misaligned and it
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| /linux-6.12.1/scripts/ |
| D | spelling.txt | 1006 misalinged||misaligned
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