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Searched refs:min_pll_rate (Results 1 – 6 of 6) sorted by relevance

/linux-6.12.1/drivers/gpu/drm/msm/dsi/phy/
Ddsi_phy_7nm.c521 if (rate < pll_7nm->phy->cfg->min_pll_rate) in dsi_pll_7nm_clk_round_rate()
522 return pll_7nm->phy->cfg->min_pll_rate; in dsi_pll_7nm_clk_round_rate()
1154 .min_pll_rate = 600000000UL,
1174 .min_pll_rate = 600000000UL,
1197 .min_pll_rate = 1000000000UL,
1215 .min_pll_rate = 600000000UL,
1238 .min_pll_rate = 600000000UL,
1261 .min_pll_rate = 600000000UL,
1284 .min_pll_rate = 600000000UL,
1307 .min_pll_rate = 600000000UL,
Ddsi_phy_28nm.c540 if (rate < pll_28nm->phy->cfg->min_pll_rate) in dsi_pll_28nm_clk_round_rate()
541 return pll_28nm->phy->cfg->min_pll_rate; in dsi_pll_28nm_clk_round_rate()
881 .min_pll_rate = VCO_MIN_RATE,
898 .min_pll_rate = VCO_MIN_RATE,
915 .min_pll_rate = VCO_MIN_RATE,
933 .min_pll_rate = VCO_MIN_RATE,
951 .min_pll_rate = VCO_MIN_RATE,
Ddsi_phy_14nm.c546 dsi_pll_14nm_vco_set_rate(hw, pll_14nm->phy->cfg->min_pll_rate, VCO_REF_CLK_RATE); in dsi_pll_14nm_vco_prepare()
585 if (rate < pll_14nm->phy->cfg->min_pll_rate) in dsi_pll_14nm_clk_round_rate()
586 return pll_14nm->phy->cfg->min_pll_rate; in dsi_pll_14nm_clk_round_rate()
1046 .min_pll_rate = VCO_MIN_RATE,
1063 .min_pll_rate = VCO_MIN_RATE,
1080 .min_pll_rate = VCO_MIN_RATE,
1095 .min_pll_rate = VCO_MIN_RATE,
Ddsi_phy_28nm_8960.c238 if (rate < pll_28nm->phy->cfg->min_pll_rate) in dsi_pll_28nm_clk_round_rate()
239 return pll_28nm->phy->cfg->min_pll_rate; in dsi_pll_28nm_clk_round_rate()
643 .min_pll_rate = VCO_MIN_RATE,
Ddsi_phy.h31 unsigned long min_pll_rate; member
Ddsi_phy_10nm.c451 if (rate < pll_10nm->phy->cfg->min_pll_rate) in dsi_pll_10nm_clk_round_rate()
452 return pll_10nm->phy->cfg->min_pll_rate; in dsi_pll_10nm_clk_round_rate()
1007 .min_pll_rate = 1000000000UL,
1025 .min_pll_rate = 1000000000UL,