| /linux-6.12.1/drivers/gpu/drm/amd/display/dc/dml/dcn32/ |
| D | display_rq_dlg_calc_32.c | 229 unsigned int min_dst_y_next_start; in dml32_rq_dlg_get_dlg_reg() local
280 min_dst_y_next_start = get_min_dst_y_next_start(mode_lib, e2e_pipe_param, num_pipes, pipe_idx); in dml32_rq_dlg_get_dlg_reg()
283 dml_print("DML_DLG: %s: min_dst_y_next_start = %d\n", __func__, min_dst_y_next_start); in dml32_rq_dlg_get_dlg_reg()
441 dlg_regs->min_dst_y_next_start = min_dst_y_next_start * dml_pow(2, 2); in dml32_rq_dlg_get_dlg_reg()
442 ASSERT(dlg_regs->min_dst_y_next_start < (unsigned int)dml_pow(2, 18)); in dml32_rq_dlg_get_dlg_reg()
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| /linux-6.12.1/drivers/gpu/drm/amd/display/dc/dml2/ |
| D | dml_display_rq_dlg_calc.c | 267 dml_uint_t min_dst_y_next_start; in dml_rq_dlg_get_dlg_reg() local
323 min_dst_y_next_start = (dml_uint_t)(dml_get_min_dst_y_next_start(mode_lib, pipe_idx)); in dml_rq_dlg_get_dlg_reg()
326 dml_print("DML_DLG: %s: min_dst_y_next_start = %d\n", __func__, min_dst_y_next_start); in dml_rq_dlg_get_dlg_reg()
411 …disp_dlg_regs->min_dst_y_next_start = (dml_uint_t)((dml_float_t) min_dst_y_next_start * dml_pow(2,… in dml_rq_dlg_get_dlg_reg()
412 ASSERT(disp_dlg_regs->min_dst_y_next_start < (dml_uint_t)dml_pow(2, 18)); in dml_rq_dlg_get_dlg_reg()
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| D | display_mode_core.h | 186 dml_get_per_surface_var_decl(min_dst_y_next_start, dml_uint_t);
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| D | dml2_translation_helper.c | 1437 out->dlg_regs.min_dst_y_next_start = disp_dlg_regs->min_dst_y_next_start; in dml2_update_pipe_ctx_dchub_regs()
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| D | display_mode_util.c | 255 dml_print("DML: min_dst_y_next_start = 0x%x\n", dlg_regs->min_dst_y_next_start); in dml_print_dlg_regs_st()
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| D | display_mode_core_structs.h | 1875 dml_uint_t min_dst_y_next_start; member
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| /linux-6.12.1/drivers/gpu/drm/amd/display/dc/hubp/dcn21/ |
| D | dcn21_hubp.c | 361 MIN_DST_Y_NEXT_START, &dlg_attr.min_dst_y_next_start); in hubp21_validate_dml_output()
376 if (dlg_attr.min_dst_y_next_start != dml_dlg_attr->min_dst_y_next_start) in hubp21_validate_dml_output()
378 dml_dlg_attr->min_dst_y_next_start, dlg_attr.min_dst_y_next_start); in hubp21_validate_dml_output()
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| /linux-6.12.1/drivers/gpu/drm/amd/display/dc/hubp/dcn20/ |
| D | dcn20_hubp.c | 94 MIN_DST_Y_NEXT_START, dlg_attr->min_dst_y_next_start); in hubp2_program_deadline()
1144 MIN_DST_Y_NEXT_START, &dlg_attr->min_dst_y_next_start); in hubp2_read_state_common()
1454 MIN_DST_Y_NEXT_START, &dlg_attr.min_dst_y_next_start); in hubp2_validate_dml_output()
1469 if (dlg_attr.min_dst_y_next_start != dml_dlg_attr->min_dst_y_next_start) in hubp2_validate_dml_output()
1471 dml_dlg_attr->min_dst_y_next_start, dlg_attr.min_dst_y_next_start); in hubp2_validate_dml_output()
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| /linux-6.12.1/drivers/gpu/drm/amd/display/dc/dml2/dml21/inc/ |
| D | dml_top_dchub_registers.h | 14 uint32_t min_dst_y_next_start; member
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| D | dml_top_types.h | 606 double min_dst_y_next_start[DML2_MAX_PLANES]; member
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| /linux-6.12.1/drivers/gpu/drm/amd/display/dc/dml/ |
| D | display_rq_dlg_helpers.c | 203 dlg_regs->min_dst_y_next_start); in print__dlg_regs_st()
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| D | display_mode_structs.h | 623 unsigned int min_dst_y_next_start; member
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| D | dml1_display_rq_dlg_calc.c | 1175 disp_dlg_regs->min_dst_y_next_start = (unsigned int) (((double) dlg_vblank_start in dml1_rq_dlg_get_dlg_params()
1177 ASSERT(disp_dlg_regs->min_dst_y_next_start < (unsigned int) dml_pow(2, 18)); in dml1_rq_dlg_get_dlg_params()
1189 disp_dlg_regs->min_dst_y_next_start); in dml1_rq_dlg_get_dlg_params()
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| D | display_mode_vba.h | 143 dml_get_pipe_attr_decl(min_dst_y_next_start);
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| /linux-6.12.1/drivers/gpu/drm/amd/display/dc/dml2/dml21/ |
| D | dml21_utils.c | 180 out->dlg_regs.min_dst_y_next_start = disp_dlg_regs->min_dst_y_next_start; in dml21_update_pipe_ctx_dchub_regs()
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| /linux-6.12.1/drivers/gpu/drm/amd/display/dc/dml/dcn21/ |
| D | display_rq_dlg_calc_21.c | 986 disp_dlg_regs->min_dst_y_next_start = (unsigned int) (((double) dlg_vblank_start) * dml_pow(2, 2)); in dml_rq_dlg_get_dlg_params()
987 ASSERT(disp_dlg_regs->min_dst_y_next_start < (unsigned int)dml_pow(2, 18)); in dml_rq_dlg_get_dlg_params()
1008 disp_dlg_regs->min_dst_y_next_start); in dml_rq_dlg_get_dlg_params()
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| /linux-6.12.1/drivers/gpu/drm/amd/display/dc/dml/dcn20/ |
| D | display_rq_dlg_calc_20.c | 940 disp_dlg_regs->min_dst_y_next_start = (unsigned int) ((double) dlg_vblank_start * dml_pow(2, 2)); in dml20_rq_dlg_get_dlg_params()
941 ASSERT(disp_dlg_regs->min_dst_y_next_start < (unsigned int) dml_pow(2, 18)); in dml20_rq_dlg_get_dlg_params()
957 disp_dlg_regs->min_dst_y_next_start); in dml20_rq_dlg_get_dlg_params()
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| D | display_rq_dlg_calc_20v2.c | 940 disp_dlg_regs->min_dst_y_next_start = (unsigned int) (((double) dlg_vblank_start in dml20v2_rq_dlg_get_dlg_params()
942 ASSERT(disp_dlg_regs->min_dst_y_next_start < (unsigned int) dml_pow(2, 18)); in dml20v2_rq_dlg_get_dlg_params()
958 disp_dlg_regs->min_dst_y_next_start); in dml20v2_rq_dlg_get_dlg_params()
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| /linux-6.12.1/drivers/gpu/drm/amd/display/dc/dml/dcn31/ |
| D | display_rq_dlg_calc_31.c | 987 disp_dlg_regs->min_dst_y_next_start = (unsigned int) (((double) dlg_vblank_start) * dml_pow(2, 2)); in dml_rq_dlg_get_dlg_params()
989 ASSERT(disp_dlg_regs->min_dst_y_next_start < (unsigned int)dml_pow(2, 18)); in dml_rq_dlg_get_dlg_params()
992 …ML_DLG: %s: min_dst_y_next_start = 0x%0x\n", __func__, disp_dlg_regs->min_dst_y_next_start); in dml_rq_dlg_get_dlg_params()
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| /linux-6.12.1/drivers/gpu/drm/amd/display/dc/dml/dcn30/ |
| D | display_rq_dlg_calc_30.c | 1054 disp_dlg_regs->min_dst_y_next_start = (unsigned int)(((double)dlg_vblank_start in dml_rq_dlg_get_dlg_params()
1056 ASSERT(disp_dlg_regs->min_dst_y_next_start < (unsigned int)dml_pow(2, 18)); in dml_rq_dlg_get_dlg_params()
1072 disp_dlg_regs->min_dst_y_next_start); in dml_rq_dlg_get_dlg_params()
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| /linux-6.12.1/drivers/gpu/drm/amd/display/dc/hubp/dcn401/ |
| D | dcn401_hubp.c | 213 MIN_DST_Y_NEXT_START, dlg_attr->min_dst_y_next_start); in hubp401_program_deadline()
802 MIN_DST_Y_NEXT_START, &dlg_attr->min_dst_y_next_start); in hubp401_read_state()
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| /linux-6.12.1/drivers/gpu/drm/amd/display/dc/dml/dcn314/ |
| D | display_rq_dlg_calc_314.c | 1074 disp_dlg_regs->min_dst_y_next_start = vba__min_dst_y_next_start * dml_pow(2, 2); in dml_rq_dlg_get_dlg_params()
1076 ASSERT(disp_dlg_regs->min_dst_y_next_start < (unsigned int)dml_pow(2, 18)); in dml_rq_dlg_get_dlg_params()
1079 …ML_DLG: %s: min_dst_y_next_start = 0x%0x\n", __func__, disp_dlg_regs->min_dst_y_next_start); in dml_rq_dlg_get_dlg_params()
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| /linux-6.12.1/drivers/gpu/drm/amd/display/dc/hubp/dcn10/ |
| D | dcn10_hubp.c | 599 MIN_DST_Y_NEXT_START, dlg_attr->min_dst_y_next_start); in hubp1_program_deadline()
909 MIN_DST_Y_NEXT_START, &dlg_attr->min_dst_y_next_start); in hubp1_read_state_common()
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| /linux-6.12.1/drivers/gpu/drm/amd/display/dc/dcn10/ |
| D | dcn10_hw_sequencer_debug.c | 261 …s[i]->inst, dlg_regs->refcyc_h_blank_end, dlg_regs->dlg_vblank_end, dlg_regs->min_dst_y_next_start, in dcn10_get_dlg_states()
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| /linux-6.12.1/drivers/gpu/drm/amd/display/dc/dml2/dml21/src/dml2_core/ |
| D | dml2_core_shared_types.h | 1405 unsigned int min_dst_y_next_start; member
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