Searched refs:min_clk_table (Results 1 – 9 of 9) sorted by relevance
49 mcg_build_min_clk_params.min_clk_table = &dml->min_clk_table; in dml2_initialize_instance()56 core_init_params.minimum_clock_table = &dml->min_clk_table; in dml2_initialize_instance()75 pmo_init_params.mcg_clock_table_size = dml->min_clk_table.dram_bw_table.num_entries; in dml2_initialize_instance()86 …out->stage1.min_clk_index_for_latency = dml->min_clk_table.dram_bw_table.num_entries - 1; //dml->m… in setup_unoptimized_display_config_with_meta()110 l->mode_support_params.min_clk_table = &dml->min_clk_table; in dml2_check_mode_supported()132 l->dppm_map_mode_params.min_clk_table = &dml->min_clk_table; in dml2_check_mode_supported()167 l->mode_support_params.min_clk_table = &dml->min_clk_table; in dml2_build_mode_programming()178 l->mode_support_params.min_clk_table = &dml->min_clk_table; in dml2_build_mode_programming()313 l->dppm_map_mode_params.min_clk_table = &dml->min_clk_table; in dml2_build_mode_programming()
174 l->mode_support_params.min_clk_table = ¶ms->dml->min_clk_table; in dml2_top_optimization_perform_optimization_phase()228 l->mode_support_params.min_clk_table = ¶ms->dml->min_clk_table; in dml2_top_optimization_perform_optimization_phase_1()
64 struct dml2_mcg_min_clock_table *min_clk_table; member82 struct dml2_mcg_min_clock_table *min_clk_table; member366 struct dml2_mcg_min_clock_table *min_clk_table; member980 struct dml2_mcg_min_clock_table min_clk_table; member
34 *dcfclk = in_out->min_clk_table->dram_bw_table.entries[min_clock_index_for_latency].min_dcfclk_khz; in get_minimum_clocks_for_latency()35 *fclk = in_out->min_clk_table->dram_bw_table.entries[min_clock_index_for_latency].min_fclk_khz; in get_minimum_clocks_for_latency()36 …*uclk = dram_bw_kbps_to_uclk_khz(in_out->min_clk_table->dram_bw_table.entries[min_clock_index_for_… in get_minimum_clocks_for_latency()574 dispclk_khz = math_min2(dispclk_khz, in_out->min_clk_table->max_clocks_khz.dispclk); in map_mode_to_soc_dpm()
414 l->mode_support_ex_params.min_clk_table = in_out->min_clk_table; in core_dcn4_mode_support()550 l->mode_programming_ex_params.min_clk_table = in_out->instance->minimum_clock_table; in core_dcn4_mode_programming()
2052 const struct dml2_mcg_min_clock_table *min_clk_table; member2064 const struct dml2_mcg_min_clock_table *min_clk_table; member
7019 const struct dml2_mcg_min_clock_table *min_clk_table = in_out_params->min_clk_table; in dml_core_mode_support() local7047 …mode_lib->ms.DCFCLK = ((double)min_clk_table->dram_bw_table.entries[in_out_params->min_clk_index].… in dml_core_mode_support()7048 …mode_lib->ms.FabricClock = ((double)min_clk_table->dram_bw_table.entries[in_out_params->min_clk_in… in dml_core_mode_support()7049 mode_lib->ms.MaxDCFCLK = (double)min_clk_table->max_clocks_khz.dcfclk / 1000; in dml_core_mode_support()7050 mode_lib->ms.MaxFabricClock = (double)min_clk_table->max_clocks_khz.fclk / 1000; in dml_core_mode_support()7051 mode_lib->ms.max_dispclk_freq_mhz = (double)min_clk_table->max_clocks_khz.dispclk / 1000; in dml_core_mode_support()7052 mode_lib->ms.max_dscclk_freq_mhz = (double)min_clk_table->max_clocks_khz.dscclk / 1000; in dml_core_mode_support()7053 mode_lib->ms.max_dppclk_freq_mhz = (double)min_clk_table->max_clocks_khz.dppclk / 1000; in dml_core_mode_support()7054 …mode_lib->ms.uclk_freq_mhz = dram_bw_kbps_to_uclk_mhz(min_clk_table->dram_bw_table.entries[in_out_… in dml_core_mode_support()7055 …mode_lib->ms.dram_bw_mbps = ((double)min_clk_table->dram_bw_table.entries[in_out_params->min_clk_i… in dml_core_mode_support()[all …]
755 const struct dml2_mcg_min_clock_table *min_clk_table = in_out_params->min_clk_table; in dml2_core_shared_mode_support() local773 …mode_lib->ms.DCFCLK = ((double)min_clk_table->dram_bw_table.entries[in_out_params->min_clk_index].… in dml2_core_shared_mode_support()774 …mode_lib->ms.FabricClock = ((double)min_clk_table->dram_bw_table.entries[in_out_params->min_clk_in… in dml2_core_shared_mode_support()775 mode_lib->ms.MaxDCFCLK = (double)min_clk_table->max_clocks_khz.dcfclk / 1000; in dml2_core_shared_mode_support()776 mode_lib->ms.MaxFabricClock = (double)min_clk_table->max_clocks_khz.fclk / 1000; in dml2_core_shared_mode_support()777 mode_lib->ms.max_dispclk_freq_mhz = (double)min_clk_table->max_clocks_khz.dispclk / 1000; in dml2_core_shared_mode_support()778 mode_lib->ms.max_dscclk_freq_mhz = (double)min_clk_table->max_clocks_khz.dscclk / 1000; in dml2_core_shared_mode_support()779 mode_lib->ms.max_dppclk_freq_mhz = (double)min_clk_table->max_clocks_khz.dppclk / 1000; in dml2_core_shared_mode_support()780 …mode_lib->ms.uclk_freq_mhz = dram_bw_kbps_to_uclk_mhz(min_clk_table->dram_bw_table.entries[in_out_… in dml2_core_shared_mode_support()781 …mode_lib->ms.dram_bw_mbps = ((double)min_clk_table->dram_bw_table.entries[in_out_params->min_clk_i… in dml2_core_shared_mode_support()[all …]
12 return build_min_clock_table(in_out->soc_bb, in_out->min_clk_table); in mcg_dcn4_build_min_clock_table()