Searched refs:mgpu_info (Results 1 – 5 of 5) sorted by relevance
248 struct amdgpu_mgpu_info mgpu_info = { variable249 .mutex = __MUTEX_INITIALIZER(mgpu_info.mutex),251 mgpu_info.delayed_reset_work,2489 mutex_lock(&mgpu_info.mutex); in amdgpu_drv_delayed_reset_work_handler()2490 if (mgpu_info.pending_reset == true) { in amdgpu_drv_delayed_reset_work_handler()2491 mutex_unlock(&mgpu_info.mutex); in amdgpu_drv_delayed_reset_work_handler()2494 mgpu_info.pending_reset = true; in amdgpu_drv_delayed_reset_work_handler()2495 mutex_unlock(&mgpu_info.mutex); in amdgpu_drv_delayed_reset_work_handler()2501 for (i = 0; i < mgpu_info.num_dgpu; i++) { in amdgpu_drv_delayed_reset_work_handler()2502 adev = mgpu_info.gpu_ins[i].adev; in amdgpu_drv_delayed_reset_work_handler()[all …]
54 mutex_lock(&mgpu_info.mutex); in amdgpu_unregister_gpu_instance()56 for (i = 0; i < mgpu_info.num_gpu; i++) { in amdgpu_unregister_gpu_instance()57 gpu_instance = &(mgpu_info.gpu_ins[i]); in amdgpu_unregister_gpu_instance()59 mgpu_info.gpu_ins[i] = in amdgpu_unregister_gpu_instance()60 mgpu_info.gpu_ins[mgpu_info.num_gpu - 1]; in amdgpu_unregister_gpu_instance()61 mgpu_info.num_gpu--; in amdgpu_unregister_gpu_instance()63 mgpu_info.num_apu--; in amdgpu_unregister_gpu_instance()65 mgpu_info.num_dgpu--; in amdgpu_unregister_gpu_instance()70 mutex_unlock(&mgpu_info.mutex); in amdgpu_unregister_gpu_instance()104 mutex_lock(&mgpu_info.mutex); in amdgpu_register_gpu_instance()[all …]
3088 mutex_lock(&mgpu_info.mutex); in amdgpu_device_enable_mgpu_fan_boost()3095 if (mgpu_info.num_dgpu < 2) in amdgpu_device_enable_mgpu_fan_boost()3098 for (i = 0; i < mgpu_info.num_dgpu; i++) { in amdgpu_device_enable_mgpu_fan_boost()3099 gpu_ins = &(mgpu_info.gpu_ins[i]); in amdgpu_device_enable_mgpu_fan_boost()3112 mutex_unlock(&mgpu_info.mutex); in amdgpu_device_enable_mgpu_fan_boost()3173 mutex_lock(&mgpu_info.mutex); in amdgpu_device_ip_late_init()3188 if (mgpu_info.num_dgpu == adev->gmc.xgmi.num_physical_nodes) { in amdgpu_device_ip_late_init()3189 for (i = 0; i < mgpu_info.num_gpu; i++) { in amdgpu_device_ip_late_init()3190 gpu_instance = &(mgpu_info.gpu_ins[i]); in amdgpu_device_ip_late_init()3203 mutex_unlock(&mgpu_info.mutex); in amdgpu_device_ip_late_init()[all …]
216 extern struct amdgpu_mgpu_info mgpu_info;
1927 mutex_lock(&mgpu_info.mutex); in amdgpu_show_powershift_percent()1928 for (i = 0; i < mgpu_info.num_gpu; i++) { in amdgpu_show_powershift_percent()1929 if (mgpu_info.gpu_ins[i].adev->flags & AMD_IS_APU) { in amdgpu_show_powershift_percent()1930 adev = mgpu_info.gpu_ins[i].adev; in amdgpu_show_powershift_percent()1934 mutex_unlock(&mgpu_info.mutex); in amdgpu_show_powershift_percent()