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Searched refs:max_num_dp2p0_outputs (Results 1 – 14 of 14) sorted by relevance

/linux-6.12.1/drivers/gpu/drm/amd/display/dc/dml2/dml21/src/dml2_core/
Ddml2_core_dcn4.c68 .max_num_dp2p0_outputs = 4,
86 ip_caps->max_num_dp2p0_outputs = ip_params->max_num_dp2p0_outputs; in patch_ip_caps_with_explicit_ip_params()
110 ip_params->max_num_dp2p0_outputs = ip_caps->max_num_dp2p0_outputs; in patch_ip_params_with_ip_caps()
Ddml2_core_shared_types.h66 unsigned int max_num_dp2p0_outputs; member
Ddml2_core_shared.c1402 …streams && s->TotalNumberOfActiveDP2p0Outputs <= (unsigned int)mode_lib->ip.max_num_dp2p0_outputs); in dml2_core_shared_mode_support()
Ddml2_core_dcn4_calcs.c7733 …streams && s->TotalNumberOfActiveDP2p0Outputs <= (unsigned int)mode_lib->ip.max_num_dp2p0_outputs); in dml_core_mode_support()
/linux-6.12.1/drivers/gpu/drm/amd/display/dc/dml2/dml21/inc/
Ddml_top_soc_parameter_types.h169 unsigned int max_num_dp2p0_outputs; member
/linux-6.12.1/drivers/gpu/drm/amd/display/dc/dml2/dml21/inc/bounding_boxes/
Ddcn4_soc_bb.h341 .max_num_dp2p0_outputs = 4,
Ddcn3_soc_bb.h379 .max_num_dp2p0_outputs = 4,
/linux-6.12.1/drivers/gpu/drm/amd/display/dc/dml/
Ddisplay_mode_structs.h366 unsigned int max_num_dp2p0_outputs; member
Ddisplay_mode_vba.c453 mode_lib->vba.MaxNumDP2p0Outputs = ip->max_num_dp2p0_outputs; in fetch_ip_params()
/linux-6.12.1/drivers/gpu/drm/amd/display/dc/dml2/
Ddml2_translation_helper.c104 out->max_num_dp2p0_outputs = 2; in dml2_init_ip_params()
139 out->max_num_dp2p0_outputs = 2; in dml2_init_ip_params()
238 out->max_num_dp2p0_outputs = 4; //2; in dml2_init_ip_params()
600 out->max_num_dp2p0_outputs = in_ip_params->max_num_dp2p0_outputs; in dml2_translate_ip_params()
Ddisplay_mode_core_structs.h381 dml_uint_t max_num_dp2p0_outputs; member
Ddisplay_mode_core.c7268 …reams && s->TotalNumberOfActiveDP2p0Outputs <= (dml_uint_t) mode_lib->ms.ip.max_num_dp2p0_outputs); in dml_core_mode_support()
/linux-6.12.1/drivers/gpu/drm/amd/display/dc/dml/dcn321/
Ddcn321_fpu.c101 .max_num_dp2p0_outputs = 2,
/linux-6.12.1/drivers/gpu/drm/amd/display/dc/dml/dcn32/
Ddcn32_fpu.c122 .max_num_dp2p0_outputs = 2,