Searched refs:lut_bank_a (Results 1 – 8 of 8) sorted by relevance
| /linux-6.12.1/drivers/gpu/drm/amd/display/dc/mpc/dcn401/ |
| D | dcn401_mpc.c | 121 …pc *mpc, const enum MCM_LUT_ID id, const union mcm_lut_params params, bool lut_bank_a, int mpcc_id) in mpc401_populate_lut() argument
123 const enum dc_lut_mode next_mode = lut_bank_a ? LUT_RAM_A : LUT_RAM_B; in mpc401_populate_lut()
239 bool lut_bank_a, in mpc401_program_lut_mode() argument
251 REG_UPDATE(MPCC_MCM_3DLUT_MODE[mpcc_id], MPCC_MCM_3DLUT_MODE, lut_bank_a ? 1 : 2); in mpc401_program_lut_mode()
261 REG_UPDATE(MPCC_MCM_SHAPER_CONTROL[mpcc_id], MPCC_MCM_SHAPER_LUT_MODE, lut_bank_a ? 1 : 2); in mpc401_program_lut_mode()
277 MPCC_MCM_1DLUT_SELECT, lut_bank_a ? 0 : 1); in mpc401_program_lut_mode()
282 …ram_lut_read_write_control(struct mpc *mpc, const enum MCM_LUT_ID id, bool lut_bank_a, int mpcc_id) in mpc401_program_lut_read_write_control() argument
289 …REG_UPDATE(MPCC_MCM_3DLUT_READ_WRITE_CONTROL[mpcc_id], MPCC_MCM_3DLUT_RAM_SEL, lut_bank_a ? 0 : 1); in mpc401_program_lut_read_write_control()
292 mpc32_configure_shaper_lut(mpc, lut_bank_a, mpcc_id); in mpc401_program_lut_read_write_control()
295 mpc32_configure_post1dlut(mpc, lut_bank_a, mpcc_id); in mpc401_program_lut_read_write_control()
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| D | dcn401_mpc.h | 209 bool lut_bank_a, int mpcc_id);
215 bool lut_bank_a,
221 bool lut_bank_a,
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| /linux-6.12.1/drivers/gpu/drm/amd/display/dc/inc/hw/ |
| D | mpc.h | 1005 bool lut_bank_a, int mpcc_id);
1022 …void (*program_lut_read_write_control)(struct mpc *mpc, const enum MCM_LUT_ID id, bool lut_bank_a,…
1041 bool lut_bank_a, int mpcc_id);
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| /linux-6.12.1/drivers/gpu/drm/amd/display/dc/hwss/dcn401/ |
| D | dcn401_hwseq.c | 485 bool lut_bank_a) in dcn401_populate_mcm_luts() argument
521 mpc->funcs->populate_lut(mpc, MCM_LUT_1DLUT, m_lut_params, lut_bank_a, mpcc_id); in dcn401_populate_mcm_luts()
524 mpc->funcs->program_lut_mode(mpc, MCM_LUT_1DLUT, lut1d_xable, lut_bank_a, mpcc_id); in dcn401_populate_mcm_luts()
541 mpc->funcs->populate_lut(mpc, MCM_LUT_SHAPER, m_lut_params, lut_bank_a, mpcc_id); in dcn401_populate_mcm_luts()
544 mpc->funcs->program_lut_mode(mpc, MCM_LUT_SHAPER, shaper_xable, lut_bank_a, mpcc_id); in dcn401_populate_mcm_luts()
556 mpc->funcs->populate_lut(mpc, MCM_LUT_3DLUT, m_lut_params, lut_bank_a, mpcc_id); in dcn401_populate_mcm_luts()
558 mpc->funcs->program_lut_mode(mpc, MCM_LUT_3DLUT, lut3d_xable, lut_bank_a, in dcn401_populate_mcm_luts()
565 mpc->funcs->program_lut_read_write_control(mpc, MCM_LUT_3DLUT, lut_bank_a, mpcc_id); in dcn401_populate_mcm_luts()
567 mpc->funcs->program_lut_mode(mpc, MCM_LUT_3DLUT, lut3d_xable, lut_bank_a, mpcc_id); in dcn401_populate_mcm_luts()
648 mpc->funcs->program_lut_mode(mpc, MCM_LUT_SHAPER, MCM_LUT_DISABLE, lut_bank_a, mpcc_id); in dcn401_populate_mcm_luts()
[all …]
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| D | dcn401_hwseq.h | 55 bool lut_bank_a);
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| /linux-6.12.1/drivers/gpu/drm/amd/display/dc/hwss/ |
| D | hw_sequencer_private.h | 184 bool lut_bank_a);
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| /linux-6.12.1/drivers/gpu/drm/amd/display/dc/hwss/dcn20/ |
| D | dcn20_hwseq.c | 1938 pipe_ctx->plane_state->lut_bank_a); in dcn20_program_pipe()
1939 pipe_ctx->plane_state->lut_bank_a = !pipe_ctx->plane_state->lut_bank_a; in dcn20_program_pipe()
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| /linux-6.12.1/drivers/gpu/drm/amd/display/dc/ |
| D | dc.h | 1354 bool lut_bank_a; member
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