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Searched refs:low_part (Results 1 – 25 of 35) sorted by relevance

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/linux-6.12.1/drivers/gpu/drm/amd/display/dc/hubp/dcn30/
Ddcn30_hubp.c122 address->grph.meta_addr.low_part); in hubp3_program_surface_flip_and_addr()
131 address->grph.addr.low_part); in hubp3_program_surface_flip_and_addr()
151 address->video_progressive.chroma_meta_addr.low_part); in hubp3_program_surface_flip_and_addr()
159 address->video_progressive.luma_meta_addr.low_part); in hubp3_program_surface_flip_and_addr()
168 address->video_progressive.chroma_addr.low_part); in hubp3_program_surface_flip_and_addr()
176 address->video_progressive.luma_addr.low_part); in hubp3_program_surface_flip_and_addr()
202 address->grph_stereo.right_alpha_meta_addr.low_part); in hubp3_program_surface_flip_and_addr()
210 address->grph_stereo.right_meta_addr.low_part); in hubp3_program_surface_flip_and_addr()
220 address->grph_stereo.left_alpha_meta_addr.low_part); in hubp3_program_surface_flip_and_addr()
228 address->grph_stereo.left_meta_addr.low_part); in hubp3_program_surface_flip_and_addr()
[all …]
/linux-6.12.1/drivers/gpu/drm/amd/display/dmub/src/
Ddmub_dcn30.c102 REG_WRITE(DMCUB_REGION3_CW0_OFFSET, offset.u.low_part); in dmub_dcn30_backdoor_load()
111 REG_WRITE(DMCUB_REGION3_CW1_OFFSET, offset.u.low_part); in dmub_dcn30_backdoor_load()
137 REG_WRITE(DMCUB_REGION3_CW2_OFFSET, offset.u.low_part); in dmub_dcn30_setup_windows()
152 REG_WRITE(DMCUB_REGION3_CW3_OFFSET, offset.u.low_part); in dmub_dcn30_setup_windows()
163 REG_WRITE(DMCUB_REGION3_CW4_OFFSET, offset.u.low_part); in dmub_dcn30_setup_windows()
170 REG_WRITE(DMCUB_REGION4_OFFSET, offset.u.low_part); in dmub_dcn30_setup_windows()
180 REG_WRITE(DMCUB_REGION3_CW5_OFFSET, offset.u.low_part); in dmub_dcn30_setup_windows()
187 REG_WRITE(DMCUB_REGION5_OFFSET, offset.u.low_part); in dmub_dcn30_setup_windows()
196 REG_WRITE(DMCUB_REGION3_CW6_OFFSET, offset.u.low_part); in dmub_dcn30_setup_windows()
Ddmub_dcn32.c164 REG_WRITE(DMCUB_REGION3_CW0_OFFSET, offset.u.low_part); in dmub_dcn32_backdoor_load()
173 REG_WRITE(DMCUB_REGION3_CW1_OFFSET, offset.u.low_part); in dmub_dcn32_backdoor_load()
194 REG_WRITE(DMCUB_REGION3_CW0_OFFSET, offset.u.low_part); in dmub_dcn32_backdoor_load_zfb_mode()
203 REG_WRITE(DMCUB_REGION3_CW1_OFFSET, offset.u.low_part); in dmub_dcn32_backdoor_load_zfb_mode()
226 REG_WRITE(DMCUB_REGION3_CW3_OFFSET, offset.u.low_part); in dmub_dcn32_setup_windows()
235 REG_WRITE(DMCUB_REGION3_CW4_OFFSET, offset.u.low_part); in dmub_dcn32_setup_windows()
244 REG_WRITE(DMCUB_REGION3_CW5_OFFSET, offset.u.low_part); in dmub_dcn32_setup_windows()
251 REG_WRITE(DMCUB_REGION5_OFFSET, offset.u.low_part); in dmub_dcn32_setup_windows()
260 REG_WRITE(DMCUB_REGION3_CW6_OFFSET, offset.u.low_part); in dmub_dcn32_setup_windows()
523 REG_WRITE(DMCUB_SCRATCH9, addr->grph.addr.low_part); in dmub_dcn32_save_surf_addr()
[all …]
Ddmub_dcn20.c169 REG_WRITE(DMCUB_REGION3_CW0_OFFSET, offset.u.low_part); in dmub_dcn20_backdoor_load()
178 REG_WRITE(DMCUB_REGION3_CW1_OFFSET, offset.u.low_part); in dmub_dcn20_backdoor_load()
206 REG_WRITE(DMCUB_REGION3_CW2_OFFSET, offset.u.low_part); in dmub_dcn20_setup_windows()
221 REG_WRITE(DMCUB_REGION3_CW3_OFFSET, offset.u.low_part); in dmub_dcn20_setup_windows()
233 REG_WRITE(DMCUB_REGION3_CW4_OFFSET, offset.u.low_part); in dmub_dcn20_setup_windows()
240 REG_WRITE(DMCUB_REGION4_OFFSET, offset.u.low_part); in dmub_dcn20_setup_windows()
250 REG_WRITE(DMCUB_REGION3_CW5_OFFSET, offset.u.low_part); in dmub_dcn20_setup_windows()
257 REG_WRITE(DMCUB_REGION5_OFFSET, offset.u.low_part); in dmub_dcn20_setup_windows()
266 REG_WRITE(DMCUB_REGION3_CW6_OFFSET, offset.u.low_part); in dmub_dcn20_setup_windows()
Ddmub_dcn35.c183 REG_WRITE(DMCUB_REGION3_CW0_OFFSET, offset.u.low_part); in dmub_dcn35_backdoor_load()
192 REG_WRITE(DMCUB_REGION3_CW1_OFFSET, offset.u.low_part); in dmub_dcn35_backdoor_load()
211 REG_WRITE(DMCUB_REGION3_CW0_OFFSET, offset.u.low_part); in dmub_dcn35_backdoor_load_zfb_mode()
218 REG_WRITE(DMCUB_REGION3_CW1_OFFSET, offset.u.low_part); in dmub_dcn35_backdoor_load_zfb_mode()
239 REG_WRITE(DMCUB_REGION3_CW3_OFFSET, offset.u.low_part); in dmub_dcn35_setup_windows()
248 REG_WRITE(DMCUB_REGION3_CW4_OFFSET, offset.u.low_part); in dmub_dcn35_setup_windows()
257 REG_WRITE(DMCUB_REGION3_CW5_OFFSET, offset.u.low_part); in dmub_dcn35_setup_windows()
264 REG_WRITE(DMCUB_REGION5_OFFSET, offset.u.low_part); in dmub_dcn35_setup_windows()
273 REG_WRITE(DMCUB_REGION3_CW6_OFFSET, offset.u.low_part); in dmub_dcn35_setup_windows()
282 REG_WRITE(DMCUB_REGION6_OFFSET, offset.u.low_part); in dmub_dcn35_setup_windows()
Ddmub_dcn401.c138 REG_WRITE(DMCUB_REGION3_CW0_OFFSET, offset.u.low_part); in dmub_dcn401_backdoor_load()
147 REG_WRITE(DMCUB_REGION3_CW1_OFFSET, offset.u.low_part); in dmub_dcn401_backdoor_load()
168 REG_WRITE(DMCUB_REGION3_CW0_OFFSET, offset.u.low_part); in dmub_dcn401_backdoor_load_zfb_mode()
177 REG_WRITE(DMCUB_REGION3_CW1_OFFSET, offset.u.low_part); in dmub_dcn401_backdoor_load_zfb_mode()
200 REG_WRITE(DMCUB_REGION3_CW3_OFFSET, offset.u.low_part); in dmub_dcn401_setup_windows()
209 REG_WRITE(DMCUB_REGION3_CW4_OFFSET, offset.u.low_part); in dmub_dcn401_setup_windows()
218 REG_WRITE(DMCUB_REGION3_CW5_OFFSET, offset.u.low_part); in dmub_dcn401_setup_windows()
225 REG_WRITE(DMCUB_REGION5_OFFSET, offset.u.low_part); in dmub_dcn401_setup_windows()
234 REG_WRITE(DMCUB_REGION3_CW6_OFFSET, offset.u.low_part); in dmub_dcn401_setup_windows()
243 REG_WRITE(DMCUB_REGION6_OFFSET, offset.u.low_part); in dmub_dcn401_setup_windows()
Ddmub_dcn31.c165 REG_WRITE(DMCUB_REGION3_CW0_OFFSET, offset.u.low_part); in dmub_dcn31_backdoor_load()
174 REG_WRITE(DMCUB_REGION3_CW1_OFFSET, offset.u.low_part); in dmub_dcn31_backdoor_load()
197 REG_WRITE(DMCUB_REGION3_CW3_OFFSET, offset.u.low_part); in dmub_dcn31_setup_windows()
206 REG_WRITE(DMCUB_REGION3_CW4_OFFSET, offset.u.low_part); in dmub_dcn31_setup_windows()
215 REG_WRITE(DMCUB_REGION3_CW5_OFFSET, offset.u.low_part); in dmub_dcn31_setup_windows()
222 REG_WRITE(DMCUB_REGION5_OFFSET, offset.u.low_part); in dmub_dcn31_setup_windows()
231 REG_WRITE(DMCUB_REGION3_CW6_OFFSET, offset.u.low_part); in dmub_dcn31_setup_windows()
/linux-6.12.1/drivers/gpu/drm/amd/display/dc/hubp/dcn10/
Ddcn10_hubp.c402 address->grph.meta_addr.low_part); in hubp1_program_surface_flip_and_addr()
411 address->grph.addr.low_part); in hubp1_program_surface_flip_and_addr()
431 address->video_progressive.chroma_meta_addr.low_part); in hubp1_program_surface_flip_and_addr()
439 address->video_progressive.luma_meta_addr.low_part); in hubp1_program_surface_flip_and_addr()
448 address->video_progressive.chroma_addr.low_part); in hubp1_program_surface_flip_and_addr()
456 address->video_progressive.luma_addr.low_part); in hubp1_program_surface_flip_and_addr()
482 address->grph_stereo.right_meta_addr.low_part); in hubp1_program_surface_flip_and_addr()
492 address->grph_stereo.left_meta_addr.low_part); in hubp1_program_surface_flip_and_addr()
501 address->grph_stereo.right_addr.low_part); in hubp1_program_surface_flip_and_addr()
509 address->grph_stereo.left_addr.low_part); in hubp1_program_surface_flip_and_addr()
[all …]
/linux-6.12.1/drivers/gpu/drm/amd/display/dc/hubp/dcn401/
Ddcn401_hubp.c49 REG_WRITE(HUBP_3DLUT_ADDRESS_LOW, address.lut3d.addr.low_part); in hubp401_program_3dlut_fl_addr()
405 address->grph.addr.low_part); in hubp401_program_surface_flip_and_addr()
422 address->video_progressive.chroma_addr.low_part); in hubp401_program_surface_flip_and_addr()
430 address->video_progressive.luma_addr.low_part); in hubp401_program_surface_flip_and_addr()
450 address->grph_stereo.right_alpha_addr.low_part); in hubp401_program_surface_flip_and_addr()
458 address->grph_stereo.right_addr.low_part); in hubp401_program_surface_flip_and_addr()
466 address->grph_stereo.left_alpha_addr.low_part); in hubp401_program_surface_flip_and_addr()
474 address->grph_stereo.left_addr.low_part); in hubp401_program_surface_flip_and_addr()
491 address->rgbea.alpha_addr.low_part); in hubp401_program_surface_flip_and_addr()
499 address->rgbea.addr.low_part); in hubp401_program_surface_flip_and_addr()
/linux-6.12.1/drivers/gpu/drm/amd/display/dc/hubp/dcn21/
Ddcn21_hubp.c716 address->grph.meta_addr.low_part; in hubp21_program_surface_flip_and_addr()
722 address->grph.addr.low_part; in hubp21_program_surface_flip_and_addr()
733 address->video_progressive.luma_meta_addr.low_part; in hubp21_program_surface_flip_and_addr()
738 address->video_progressive.chroma_meta_addr.low_part; in hubp21_program_surface_flip_and_addr()
744 address->video_progressive.luma_addr.low_part; in hubp21_program_surface_flip_and_addr()
749 address->video_progressive.chroma_addr.low_part; in hubp21_program_surface_flip_and_addr()
765 address->grph_stereo.right_meta_addr.low_part; in hubp21_program_surface_flip_and_addr()
772 address->grph_stereo.left_meta_addr.low_part; in hubp21_program_surface_flip_and_addr()
778 address->grph_stereo.left_addr.low_part; in hubp21_program_surface_flip_and_addr()
783 address->grph_stereo.right_addr.low_part; in hubp21_program_surface_flip_and_addr()
/linux-6.12.1/drivers/gpu/drm/amd/display/dc/hubp/dcn20/
Ddcn20_hubp.c68 DCN_VM_SYSTEM_APERTURE_DEFAULT_ADDR_LSB, mc_vm_apt_default.low_part); in hubp2_set_vm_system_aperture_settings()
605 CURSOR_SURFACE_ADDRESS, attr->address.low_part); in hubp2_cursor_set_attributes()
624 hubp->att.SURFACE_ADDR = attr->address.low_part; in hubp2_cursor_set_attributes()
662 REG_WRITE(DMDATA_ADDRESS_LOW, attr->address.low_part); in hubp2_dmdata_set_attributes()
756 address->grph.meta_addr.low_part); in hubp2_program_surface_flip_and_addr()
765 address->grph.addr.low_part); in hubp2_program_surface_flip_and_addr()
785 address->video_progressive.chroma_meta_addr.low_part); in hubp2_program_surface_flip_and_addr()
793 address->video_progressive.luma_meta_addr.low_part); in hubp2_program_surface_flip_and_addr()
802 address->video_progressive.chroma_addr.low_part); in hubp2_program_surface_flip_and_addr()
810 address->video_progressive.luma_addr.low_part); in hubp2_program_surface_flip_and_addr()
[all …]
/linux-6.12.1/drivers/gpu/drm/amd/display/dc/inc/
Dcompressor.h42 uint32_t low_part; member
/linux-6.12.1/drivers/gpu/drm/amd/display/dc/hwss/dcn201/
Ddcn201_hwseq.c212 hws->fb_base.low_part = fb_base; in read_mmhub_vm_setup()
215 hws->fb_top.low_part = fb_top; in read_mmhub_vm_setup()
217 hws->fb_offset.low_part = fb_offset; in read_mmhub_vm_setup()
/linux-6.12.1/drivers/gpu/drm/amd/display/dc/
Ddc_hw_types.h47 uint32_t low_part; member
52 uint32_t low_part; member
Ddc_dmub_srv.c1819 address->grph.meta_addr.low_part; in dc_dmub_srv_fams2_passthrough_flip()
1823 address->grph.addr.low_part; in dc_dmub_srv_fams2_passthrough_flip()
1835 address->video_progressive.luma_meta_addr.low_part; in dc_dmub_srv_fams2_passthrough_flip()
1839 address->video_progressive.chroma_meta_addr.low_part; in dc_dmub_srv_fams2_passthrough_flip()
1843 address->video_progressive.luma_addr.low_part; in dc_dmub_srv_fams2_passthrough_flip()
1847 address->video_progressive.chroma_addr.low_part; in dc_dmub_srv_fams2_passthrough_flip()
/linux-6.12.1/drivers/gpu/drm/amd/display/dc/hubp/dcn32/
Ddcn32_hubp.c127 CURSOR_SURFACE_ADDRESS, attr->address.low_part); in hubp32_cursor_set_attributes()
/linux-6.12.1/drivers/gpu/drm/amd/display/dc/mmhubbub/dcn32/
Ddcn32_mmhubbub.c84 …SET(MMHUBBUB_WARMUP_BASE_ADDR_LOW, 0, MMHUBBUB_WARMUP_BASE_ADDR_LOW, start_address_shift.low_part); in mmhubbub32_warmup_mcif()
/linux-6.12.1/drivers/gpu/drm/amd/display/dc/dcn30/
Ddcn30_mmhubbub.c84 …SET(MMHUBBUB_WARMUP_BASE_ADDR_LOW, 0, MMHUBBUB_WARMUP_BASE_ADDR_LOW, start_address_shift.low_part); in mmhubbub3_warmup_mcif()
/linux-6.12.1/drivers/gpu/drm/amd/display/dc/dce/
Ddce_ipp.c131 CURSOR_SURFACE_ADDRESS, attributes->address.low_part); in dce_ipp_cursor_set_attributes()
Ddce_mem_input.c804 GRPH_SECONDARY_SURFACE_ADDRESS, address.low_part >> 8, in program_sec_addr()
819 address.low_part >> 8); in program_pri_addr()
/linux-6.12.1/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn316/
Ddcn316_clk_mgr.c417 clk_mgr_dcn316->smu_wm_set.mc_address.low_part); in dcn316_notify_wm_ranges()
437 smu_dpm_clks->mc_address.low_part); in dcn316_get_dpm_table_from_smu()
/linux-6.12.1/drivers/gpu/drm/amd/display/amdgpu_dm/
Damdgpu_dm_plane.c345 address->grph.meta_addr.low_part = lower_32_bits(dcc_address); in amdgpu_dm_plane_fill_gfx9_plane_attributes_from_modifiers()
866 address->grph.addr.low_part = lower_32_bits(addr); in amdgpu_dm_plane_fill_plane_buffer_attributes()
889 address->video_progressive.luma_addr.low_part = in amdgpu_dm_plane_fill_plane_buffer_attributes()
893 address->video_progressive.chroma_addr.low_part = in amdgpu_dm_plane_fill_plane_buffer_attributes()
1370 attributes.address.low_part = lower_32_bits(address); in amdgpu_dm_plane_handle_cursor_update()
/linux-6.12.1/drivers/gpu/drm/amd/display/dc/dce110/
Ddce110_mem_input_v.c81 temp = address.low_part >> in program_pri_addr_c()
117 temp = address.low_part >> in program_pri_addr_l()
/linux-6.12.1/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn301/
Dvg_clk_mgr.c461 clk_mgr_vgh->smu_wm_set.mc_address.low_part); in vg_notify_wm_ranges()
657 smu_dpm_clks->mc_address.low_part); in vg_get_dpm_table_from_smu()
/linux-6.12.1/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn31/
Ddcn31_clk_mgr.c495 clk_mgr_dcn31->smu_wm_set.mc_address.low_part); in dcn31_notify_wm_ranges()
515 smu_dpm_clks->mc_address.low_part); in dcn31_get_dpm_table_from_smu()

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