| /linux-6.12.1/drivers/thunderbolt/ |
| D | dma_test.c | 104 enum tb_link_width link_width; member
393 *val = dt->link_width; in lanes_get()
403 dt->link_width = val; in lanes_set()
467 switch (dt->link_width) { in dma_test_set_bonding()
493 } else if (dt->link_width && dt->link_width != dt->xd->link_width) { in dma_test_check_errors()
530 if (dt->link_width) in test_store()
531 dev_dbg(&svc->dev, "link_width: %u\n", dt->link_width); in test_store()
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| D | tb.c | 698 int link_speed, link_width, up_bw, down_bw; in tb_maximum_bandwidth() local
713 if (port->sw->link_width == TB_LINK_WIDTH_ASYM_TX) { in tb_maximum_bandwidth()
716 } else if (port->sw->link_width == TB_LINK_WIDTH_ASYM_RX) { in tb_maximum_bandwidth()
734 up_bw = link_speed * port->sw->link_width * 1000; in tb_maximum_bandwidth()
742 link_width = tb_port_get_link_width(port); in tb_maximum_bandwidth()
743 if (link_width < 0) in tb_maximum_bandwidth()
744 return link_width; in tb_maximum_bandwidth()
746 if (link_width == TB_LINK_WIDTH_ASYM_TX) { in tb_maximum_bandwidth()
749 } else if (link_width == TB_LINK_WIDTH_ASYM_RX) { in tb_maximum_bandwidth()
767 up_bw = link_speed * link_width * 1000; in tb_maximum_bandwidth()
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| D | switch.c | 1965 switch (sw->link_width) { in rx_lanes_show()
1991 switch (sw->link_width) { in tx_lanes_show()
2840 if (sw->link_width != ret) in tb_switch_update_link_attributes()
2842 sw->link_width = ret; in tb_switch_update_link_attributes()
2861 tb_sw_dbg(sw, "current link width %s\n", tb_width_name(sw->link_width)); in tb_switch_link_init()
2863 bonded = sw->link_width >= TB_LINK_WIDTH_DUAL; in tb_switch_link_init()
2891 sw->preferred_link_width = sw->link_width; in tb_switch_link_init()
3015 if (sw->link_width != width) { in tb_switch_asym_enable()
3050 if (sw->link_width > TB_LINK_WIDTH_DUAL) { in tb_switch_asym_disable()
3051 if (sw->link_width == TB_LINK_WIDTH_ASYM_TX) in tb_switch_asym_disable()
[all …]
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| D | xdomain.c | 1184 if (xd->link_width != ret) in tb_xdomain_update_link_attributes()
1187 xd->link_width = ret; in tb_xdomain_update_link_attributes()
1468 tb_width_name(xd->link_width)); in tb_xdomain_get_properties()
1792 switch (xd->link_width) { in rx_lanes_show()
1818 switch (xd->link_width) { in tx_lanes_show()
1930 } else if (xd->link_width > TB_LINK_WIDTH_SINGLE) { in tb_xdomain_link_exit()
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| D | icm.c | 853 sw->link_width = dual_lane ? TB_LINK_WIDTH_DUAL : in icm_fr_device_connected()
1276 sw->link_width = dual_lane ? TB_LINK_WIDTH_DUAL : in __icm_tr_device_connected()
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| D | tb.h | 183 enum tb_link_width link_width; member
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| /linux-6.12.1/drivers/infiniband/hw/hfi1/ |
| D | mad.h | 400 u16 tx_link_width(u16 link_width);
401 u64 get_xmit_wait_counters(struct hfi1_pportdata *ppd, u16 link_width,
431 static inline u64 convert_xmit_counter(u64 xmit_wait_val, u16 link_width, in convert_xmit_counter() argument
434 return (xmit_wait_val * 2 * (FACTOR_LINK_WIDTH / link_width) in convert_xmit_counter()
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| D | mad.c | 803 pi->link_width.enabled = cpu_to_be16(ppd->link_width_enabled); in __subn_get_opa_portinfo()
804 pi->link_width.supported = cpu_to_be16(ppd->link_width_supported); in __subn_get_opa_portinfo()
805 pi->link_width.active = cpu_to_be16(ppd->link_width_active); in __subn_get_opa_portinfo()
1443 lwe = be16_to_cpu(pi->link_width.enabled); in __subn_set_opa_portinfo()
2617 u16 tx_link_width(u16 link_width) in tx_link_width() argument
2622 while (link_width && n) { in tx_link_width()
2623 if (link_width & (1 << (n - 1))) { in tx_link_width()
2651 u16 link_width, u16 link_speed, int vl) in get_xmit_wait_counters() argument
2676 ppd->prev_link_width = link_width; in get_xmit_wait_counters()
2700 u16 link_width; in pma_get_opa_portstatus() local
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| D | hfi.h | 1641 u16 link_width = ppd->link_width_active; in active_egress_rate() local
1649 switch (link_width) { in active_egress_rate()
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| /linux-6.12.1/drivers/gpu/drm/amd/amdgpu/ |
| D | nbio_v2_3.c | 498 uint32_t link_width = 0; in nbio_v2_3_apply_lc_spc_mode_wa() local
505 link_width = (reg_data & PCIE_LC_LINK_WIDTH_CNTL__LC_LINK_WIDTH_RD_MASK) in nbio_v2_3_apply_lc_spc_mode_wa()
512 if (0x3 == link_width) { in nbio_v2_3_apply_lc_spc_mode_wa()
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| /linux-6.12.1/include/uapi/linux/ |
| D | rio_mport_cdev.h | 77 __u8 link_width; member
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| /linux-6.12.1/include/rdma/ |
| D | opa_port_info.h | 297 } link_width; member
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| /linux-6.12.1/drivers/gpu/drm/amd/pm/swsmu/inc/ |
| D | smu_v11_0.h | 66 static const __maybe_unused uint16_t link_width[] = {0, 1, 2, 4, 8, 12, 16}; variable
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| /linux-6.12.1/drivers/ntb/hw/mscc/ |
| D | ntb_hw_switchtec.c | 88 enum ntb_width link_width; member
442 sndev->link_width = NTB_WIDTH_NONE; in switchtec_ntb_set_link_speed()
452 sndev->link_width = min(self_width, peer_width); in switchtec_ntb_set_link_speed()
568 *width = sndev->link_width; in switchtec_ntb_link_is_up()
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| /linux-6.12.1/include/linux/ |
| D | rio.h | 368 int link_width; member
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| D | thunderbolt.h | 250 enum tb_link_width link_width; member
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| /linux-6.12.1/drivers/scsi/qla4xxx/ |
| D | ql4_def.h | 749 int link_width; member
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| /linux-6.12.1/drivers/net/ethernet/myricom/myri10ge/ |
| D | myri10ge.c | 3194 int link_width; in myri10ge_select_firmware() local
3198 link_width = (lnk >> 4) & 0x3f; in myri10ge_select_firmware()
3203 if (link_width < 8) { in myri10ge_select_firmware()
3205 link_width); in myri10ge_select_firmware()
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| /linux-6.12.1/drivers/gpu/drm/amd/pm/swsmu/smu13/ |
| D | smu_v13_0.c | 87 static const int link_width[] = {0, 1, 2, 4, 8, 12, 16}; variable
2067 return link_width[width_level]; in smu_v13_0_get_current_pcie_link_width()
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| /linux-6.12.1/drivers/rapidio/devices/ |
| D | rio_mport_cdev.c | 2423 md->properties.link_width = attr.link_width; in mport_cdev_add()
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| /linux-6.12.1/drivers/gpu/drm/amd/pm/powerplay/hwmgr/ |
| D | smu7_hwmgr.c | 225 uint32_t link_width; in smu7_get_current_pcie_lane_number() local
228 link_width = PHM_READ_INDIRECT_FIELD(hwmgr->device, CGS_IND_REG__PCIE, in smu7_get_current_pcie_lane_number()
231 PP_ASSERT_WITH_CODE((7 >= link_width), in smu7_get_current_pcie_lane_number()
234 return decode_pcie_lane_width(link_width); in smu7_get_current_pcie_lane_number()
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| D | vega12_hwmgr.c | 54 static const int link_width[] = {0, 1, 2, 4, 8, 12, 16}; variable
2251 return link_width[width_level]; in vega12_get_current_pcie_link_width()
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| D | vega20_hwmgr.c | 59 static const int link_width[] = {0, 1, 2, 4, 8, 12, 16}; variable
3342 return link_width[width_level]; in vega20_get_current_pcie_link_width()
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| /linux-6.12.1/drivers/gpu/drm/radeon/ |
| D | ci_dpm.c | 4781 u32 link_width = 0; in ci_get_current_pcie_lane_number() local
4783 link_width = RREG32_PCIE_PORT(PCIE_LC_LINK_WIDTH_CNTL) & LC_LINK_WIDTH_RD_MASK; in ci_get_current_pcie_lane_number()
4784 link_width >>= LC_LINK_WIDTH_RD_SHIFT; in ci_get_current_pcie_lane_number()
4786 switch (link_width) { in ci_get_current_pcie_lane_number()
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| /linux-6.12.1/drivers/gpu/drm/amd/pm/swsmu/smu11/ |
| D | smu_v11_0.c | 2099 return link_width[width_level]; in smu_v11_0_get_current_pcie_link_width()
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