Searched refs:lane_ctrl0 (Results 1 – 1 of 1) sorted by relevance
867 u32 vreg_ctrl_0, vreg_ctrl_1, lane_ctrl0; in dsi_7nm_phy_enable() local915 lane_ctrl0 = 0x17; in dsi_7nm_phy_enable()921 lane_ctrl0 = 0x1f; in dsi_7nm_phy_enable()1018 writel(lane_ctrl0, base + REG_DSI_7nm_PHY_CMN_LANE_CTRL0); in dsi_7nm_phy_enable()