Home
last modified time | relevance | path

Searched refs:ixSQ_WAVE_VALID_AND_IDLE (Results 1 – 8 of 8) sorted by relevance

/linux-6.12.1/drivers/gpu/drm/amd/include/asic_reg/gc/
Dgc_9_4_2_offset.h7644 #define ixSQ_WAVE_VALID_AND_IDLE macro
Dgc_9_4_3_offset.h7406 #define ixSQ_WAVE_VALID_AND_IDLE macro
Dgc_11_5_0_offset.h9960 #define ixSQ_WAVE_VALID_AND_IDLE macro
Dgc_12_0_0_offset.h11005 #define ixSQ_WAVE_VALID_AND_IDLE macro
Dgc_11_0_0_offset.h11646 #define ixSQ_WAVE_VALID_AND_IDLE macro
Dgc_11_0_3_offset.h12053 #define ixSQ_WAVE_VALID_AND_IDLE macro
Dgc_10_3_0_offset.h13421 #define ixSQ_WAVE_VALID_AND_IDLE macro
/linux-6.12.1/drivers/gpu/drm/amd/amdgpu/
Dgfx_v12_0.c828 dst[(*no_fields)++] = wave_read_ind(adev, wave, ixSQ_WAVE_VALID_AND_IDLE); in gfx_v12_0_read_wave_data()