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Searched refs:ixSQ_WAVE_TTMP6 (Results 1 – 16 of 16) sorted by relevance

/linux-6.12.1/drivers/gpu/drm/amd/include/asic_reg/gca/
Dgfx_6_0_d.h103 #define ixSQ_WAVE_TTMP6 0x0276 macro
Dgfx_7_2_d.h1952 #define ixSQ_WAVE_TTMP6 0x276 macro
Dgfx_7_0_d.h1931 #define ixSQ_WAVE_TTMP6 0x276 macro
Dgfx_8_0_d.h2151 #define ixSQ_WAVE_TTMP6 0x276 macro
Dgfx_8_1_d.h2119 #define ixSQ_WAVE_TTMP6 0x276 macro
/linux-6.12.1/drivers/gpu/drm/amd/include/asic_reg/gc/
Dgc_9_0_offset.h7117 #define ixSQ_WAVE_TTMP6 macro
Dgc_9_1_offset.h7325 #define ixSQ_WAVE_TTMP6 macro
Dgc_9_2_1_offset.h7364 #define ixSQ_WAVE_TTMP6 macro
Dgc_9_4_2_offset.h7664 #define ixSQ_WAVE_TTMP6 macro
Dgc_9_4_3_offset.h7427 #define ixSQ_WAVE_TTMP6 macro
Dgc_11_5_0_offset.h9985 #define ixSQ_WAVE_TTMP6 macro
Dgc_12_0_0_offset.h11040 #define ixSQ_WAVE_TTMP6 macro
Dgc_10_1_0_offset.h11212 #define ixSQ_WAVE_TTMP6 macro
Dgc_11_0_0_offset.h11670 #define ixSQ_WAVE_TTMP6 macro
Dgc_11_0_3_offset.h12078 #define ixSQ_WAVE_TTMP6 macro
Dgc_10_3_0_offset.h13449 #define ixSQ_WAVE_TTMP6 macro