Searched refs:ixSQ_WAVE_INST_DW0 (Results 1 – 19 of 19) sorted by relevance
/linux-6.12.1/drivers/gpu/drm/amd/include/asic_reg/gca/ |
D | gfx_6_0_d.h | 82 #define ixSQ_WAVE_INST_DW0 0x001A macro
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D | gfx_7_2_d.h | 1927 #define ixSQ_WAVE_INST_DW0 0x1a macro
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D | gfx_7_0_d.h | 1906 #define ixSQ_WAVE_INST_DW0 0x1a macro
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D | gfx_8_0_d.h | 2125 #define ixSQ_WAVE_INST_DW0 0x1a macro
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D | gfx_8_1_d.h | 2093 #define ixSQ_WAVE_INST_DW0 0x1a macro
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/linux-6.12.1/drivers/gpu/drm/amd/amdgpu/ |
D | gfx_v9_4_2.c | 1840 wave_read_ind(adev, simd, wave, ixSQ_WAVE_INST_DW0); in gfx_v9_4_2_log_cu_timeout_status()
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D | gfx_v6_0.c | 2980 dst[(*no_fields)++] = wave_read_ind(adev, simd, wave, ixSQ_WAVE_INST_DW0); in gfx_v6_0_read_wave_data()
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D | gfx_v7_0.c | 4084 dst[(*no_fields)++] = wave_read_ind(adev, simd, wave, ixSQ_WAVE_INST_DW0); in gfx_v7_0_read_wave_data()
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D | gfx_v9_4_3.c | 756 dst[(*no_fields)++] = wave_read_ind(adev, xcc_id, simd, wave, ixSQ_WAVE_INST_DW0); in gfx_v9_4_3_read_wave_data()
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D | gfx_v8_0.c | 5224 dst[(*no_fields)++] = wave_read_ind(adev, simd, wave, ixSQ_WAVE_INST_DW0); in gfx_v8_0_read_wave_data()
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D | gfx_v9_0.c | 1953 dst[(*no_fields)++] = wave_read_ind(adev, simd, wave, ixSQ_WAVE_INST_DW0); in gfx_v9_0_read_wave_data()
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D | gfx_v10_0.c | 4449 dst[(*no_fields)++] = wave_read_ind(adev, wave, ixSQ_WAVE_INST_DW0); in gfx_v10_0_read_wave_data()
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/linux-6.12.1/drivers/gpu/drm/amd/include/asic_reg/gc/ |
D | gc_9_0_offset.h | 7106 #define ixSQ_WAVE_INST_DW0 … macro
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D | gc_9_1_offset.h | 7314 #define ixSQ_WAVE_INST_DW0 … macro
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D | gc_9_2_1_offset.h | 7353 #define ixSQ_WAVE_INST_DW0 … macro
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D | gc_9_4_2_offset.h | 7654 #define ixSQ_WAVE_INST_DW0 … macro
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D | gc_9_4_3_offset.h | 7416 #define ixSQ_WAVE_INST_DW0 … macro
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D | gc_10_1_0_offset.h | 11197 #define ixSQ_WAVE_INST_DW0 … macro
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D | gc_10_3_0_offset.h | 13431 #define ixSQ_WAVE_INST_DW0 … macro
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