Home
last modified time | relevance | path

Searched refs:ixSQ_WAVE_EXEC_LO (Results 1 – 25 of 25) sorted by relevance

/linux-6.12.1/drivers/gpu/drm/amd/include/asic_reg/gca/
Dgfx_6_0_d.h77 #define ixSQ_WAVE_EXEC_LO 0x027E macro
Dgfx_7_2_d.h1932 #define ixSQ_WAVE_EXEC_LO 0x27e macro
Dgfx_7_0_d.h1911 #define ixSQ_WAVE_EXEC_LO 0x27e macro
Dgfx_8_0_d.h2131 #define ixSQ_WAVE_EXEC_LO 0x27e macro
Dgfx_8_1_d.h2099 #define ixSQ_WAVE_EXEC_LO 0x27e macro
/linux-6.12.1/drivers/gpu/drm/amd/amdgpu/
Dgfx_v9_4_2.c1836 wave_read_ind(adev, simd, wave, ixSQ_WAVE_EXEC_LO); in gfx_v9_4_2_log_cu_timeout_status()
Dgfx_v6_0.c2977 dst[(*no_fields)++] = wave_read_ind(adev, simd, wave, ixSQ_WAVE_EXEC_LO); in gfx_v6_0_read_wave_data()
Dgfx_v7_0.c4081 dst[(*no_fields)++] = wave_read_ind(adev, simd, wave, ixSQ_WAVE_EXEC_LO); in gfx_v7_0_read_wave_data()
Dgfx_v9_4_3.c753 dst[(*no_fields)++] = wave_read_ind(adev, xcc_id, simd, wave, ixSQ_WAVE_EXEC_LO); in gfx_v9_4_3_read_wave_data()
Dgfx_v12_0.c812 dst[(*no_fields)++] = wave_read_ind(adev, wave, ixSQ_WAVE_EXEC_LO); in gfx_v12_0_read_wave_data()
Dgfx_v8_0.c5221 dst[(*no_fields)++] = wave_read_ind(adev, simd, wave, ixSQ_WAVE_EXEC_LO); in gfx_v8_0_read_wave_data()
Dgfx_v11_0.c983 dst[(*no_fields)++] = wave_read_ind(adev, wave, ixSQ_WAVE_EXEC_LO); in gfx_v11_0_read_wave_data()
Dgfx_v9_0.c1950 dst[(*no_fields)++] = wave_read_ind(adev, simd, wave, ixSQ_WAVE_EXEC_LO); in gfx_v9_0_read_wave_data()
Dgfx_v10_0.c4445 dst[(*no_fields)++] = wave_read_ind(adev, wave, ixSQ_WAVE_EXEC_LO); in gfx_v10_0_read_wave_data()
/linux-6.12.1/drivers/gpu/drm/amd/include/asic_reg/gc/
Dgc_9_0_offset.h7128 #define ixSQ_WAVE_EXEC_LO macro
Dgc_9_1_offset.h7336 #define ixSQ_WAVE_EXEC_LO macro
Dgc_9_2_1_offset.h7375 #define ixSQ_WAVE_EXEC_LO macro
Dgc_9_4_2_offset.h7675 #define ixSQ_WAVE_EXEC_LO macro
Dgc_9_4_3_offset.h7438 #define ixSQ_WAVE_EXEC_LO macro
Dgc_11_5_0_offset.h9996 #define ixSQ_WAVE_EXEC_LO macro
Dgc_12_0_0_offset.h11051 #define ixSQ_WAVE_EXEC_LO macro
Dgc_10_1_0_offset.h11223 #define ixSQ_WAVE_EXEC_LO macro
Dgc_11_0_0_offset.h11681 #define ixSQ_WAVE_EXEC_LO macro
Dgc_11_0_3_offset.h12089 #define ixSQ_WAVE_EXEC_LO macro
Dgc_10_3_0_offset.h13460 #define ixSQ_WAVE_EXEC_LO macro