Searched refs:ixPCIE_LC_LINK_WIDTH_CNTL (Results 1 – 6 of 6) sorted by relevance
1587 tmp = RREG32_PCIE(ixPCIE_LC_LINK_WIDTH_CNTL); in cik_pcie_gen3_enable()1596 WREG32_PCIE(ixPCIE_LC_LINK_WIDTH_CNTL, tmp); in cik_pcie_gen3_enable()1766 orig = data = RREG32_PCIE(ixPCIE_LC_LINK_WIDTH_CNTL); in cik_program_aspm()1770 WREG32_PCIE(ixPCIE_LC_LINK_WIDTH_CNTL, data); in cik_program_aspm()
1177 orig = data = RREG32_PCIE(ixPCIE_LC_LINK_WIDTH_CNTL); in vi_program_aspm()1180 WREG32_PCIE(ixPCIE_LC_LINK_WIDTH_CNTL, data); in vi_program_aspm()
438 #define ixPCIE_LC_LINK_WIDTH_CNTL 0x00A2 macro
478 #define ixPCIE_LC_LINK_WIDTH_CNTL 0x100100a2 macro
1014 #define ixPCIE_LC_LINK_WIDTH_CNTL 0x100100a2 macro
647 #define ixPCIE_LC_LINK_WIDTH_CNTL 0x100100a2 macro