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Searched refs:ixAZALIA_F2_CODEC_PIN_CONTROL_PORTID0 (Results 1 – 22 of 22) sorted by relevance

/linux-6.12.1/drivers/gpu/drm/amd/include/asic_reg/dce/
Ddce_6_0_d.h161 #define ixAZALIA_F2_CODEC_PIN_CONTROL_PORTID0 0x0003 macro
Ddce_8_0_d.h5394 #define ixAZALIA_F2_CODEC_PIN_CONTROL_PORTID0 0x3 macro
Ddce_10_0_d.h6628 #define ixAZALIA_F2_CODEC_PIN_CONTROL_PORTID0 0x3 macro
Ddce_11_0_d.h6790 #define ixAZALIA_F2_CODEC_PIN_CONTROL_PORTID0 0x3 macro
Ddce_11_2_d.h8135 #define ixAZALIA_F2_CODEC_PIN_CONTROL_PORTID0 0x3 macro
Ddce_12_0_offset.h18060 #define ixAZALIA_F2_CODEC_PIN_CONTROL_PORTID0 … macro
/linux-6.12.1/drivers/gpu/drm/amd/include/asic_reg/dcn/
Ddcn_3_0_3_offset.h7387 #define ixAZALIA_F2_CODEC_PIN_CONTROL_PORTID0 … macro
Ddcn_3_0_1_offset.h12186 #define ixAZALIA_F2_CODEC_PIN_CONTROL_PORTID0 … macro
Ddcn_1_0_offset.h13030 #define ixAZALIA_F2_CODEC_PIN_CONTROL_PORTID0 … macro
Ddcn_2_1_0_offset.h12790 #define ixAZALIA_F2_CODEC_PIN_CONTROL_PORTID0 … macro
Ddcn_3_5_1_offset.h88 #define ixAZALIA_F2_CODEC_PIN_CONTROL_PORTID0 … macro
Ddcn_3_1_2_offset.h14004 #define ixAZALIA_F2_CODEC_PIN_CONTROL_PORTID0 … macro
Ddcn_3_2_1_offset.h13511 #define ixAZALIA_F2_CODEC_PIN_CONTROL_PORTID0 … macro
Ddcn_3_2_0_offset.h13557 #define ixAZALIA_F2_CODEC_PIN_CONTROL_PORTID0 … macro
Ddcn_3_1_5_offset.h14110 #define ixAZALIA_F2_CODEC_PIN_CONTROL_PORTID0 … macro
Ddcn_3_1_4_offset.h156 #define ixAZALIA_F2_CODEC_PIN_CONTROL_PORTID0 … macro
Ddcn_3_5_0_offset.h109 #define ixAZALIA_F2_CODEC_PIN_CONTROL_PORTID0 … macro
Ddcn_4_1_0_offset.h15567 #define ixAZALIA_F2_CODEC_PIN_CONTROL_PORTID0 … macro
Ddcn_3_1_6_offset.h14601 #define ixAZALIA_F2_CODEC_PIN_CONTROL_PORTID0 … macro
Ddcn_3_0_2_offset.h15189 #define ixAZALIA_F2_CODEC_PIN_CONTROL_PORTID0 … macro
Ddcn_2_0_0_offset.h16454 #define ixAZALIA_F2_CODEC_PIN_CONTROL_PORTID0 … macro
Ddcn_3_0_0_offset.h16939 #define ixAZALIA_F2_CODEC_PIN_CONTROL_PORTID0 … macro