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Searched refs:ivpu_err_ratelimited (Results 1 – 7 of 7) sorted by relevance

/linux-6.12.1/drivers/accel/ivpu/
Divpu_jsm_msg.c107 ivpu_err_ratelimited(vdev, "Failed to register doorbell %u: %d\n", db_id, ret); in ivpu_jsm_register_db()
142 ivpu_err_ratelimited(vdev, "Failed to get heartbeat from engine %d: %d\n", in ivpu_jsm_get_heartbeat()
165 ivpu_err_ratelimited(vdev, "Failed to reset engine %d: %d\n", engine, ret); in ivpu_jsm_reset_engine()
185 ivpu_err_ratelimited(vdev, "Failed to preempt engine %d: %d\n", engine, ret); in ivpu_jsm_preempt_engine()
338 ivpu_err_ratelimited(vdev, "Failed to register doorbell %u: %d\n", db_id, ret); in ivpu_jsm_hws_register_db()
357 ivpu_err_ratelimited(vdev, "Failed to resume engine %d: %d\n", engine, ret); in ivpu_jsm_hws_resume_engine()
Divpu_mmu.c881 …ivpu_err_ratelimited(vdev, "MMU EVTQ: 0x%x (%s) SSID: %d SID: %d, e[2] %08x, e[3] %08x, in addr: 0… in ivpu_mmu_dump_event()
921 ivpu_err_ratelimited(vdev, "IRQ FIFO full\n"); in ivpu_mmu_irq_evtq_handler()
958 ivpu_err_ratelimited(vdev, "MMU PRIQ write aborted\n"); in ivpu_mmu_irq_gerr_handler()
961 ivpu_err_ratelimited(vdev, "MMU EVTQ write aborted\n"); in ivpu_mmu_irq_gerr_handler()
964 ivpu_err_ratelimited(vdev, "MMU CMDQ write aborted\n"); in ivpu_mmu_irq_gerr_handler()
Divpu_ipc.c76 ivpu_err_ratelimited(vdev, "Failed to reserve IPC buffer, size %ld\n", in ivpu_ipc_tx_prepare()
397 ivpu_err_ratelimited(vdev, "Failed to read IPC rx addr register\n"); in ivpu_ipc_irq_handler()
446 ivpu_err_ratelimited(vdev, "IRQ FIFO full\n"); in ivpu_ipc_irq_handler()
Divpu_pm.c414 ivpu_err_ratelimited(vdev, "Filed to enable DCT: %d\n", ret); in ivpu_pm_dct_enable()
431 ivpu_err_ratelimited(vdev, "Filed to disable DCT: %d\n", ret); in ivpu_pm_dct_disable()
Divpu_hw_btrs.c649 ivpu_err_ratelimited(vdev, "IRQ FIFO full\n"); in ivpu_hw_btrs_irq_handler_lnl()
707 ivpu_err_ratelimited(vdev, "Unsupported PCODE command: 0x%x\n", cmd); in ivpu_hw_btrs_dct_get_request()
719 ivpu_err_ratelimited(vdev, "Invalid PARAM1 value: %u\n", param1); in ivpu_hw_btrs_dct_get_request()
Divpu_drv.h78 #define ivpu_err_ratelimited(vdev, fmt, ...) \ macro
Divpu_drv.c494 ivpu_err_ratelimited(vdev, "Unknown IRQ source: %u\n", irq_src); in ivpu_irq_thread_handler()