/linux-6.12.1/drivers/irqchip/ |
D | irq-xtensa-pic.c | 46 u32 irq_mask; in xtensa_irq_mask() local 48 irq_mask = xtensa_get_sr(intenable); in xtensa_irq_mask() 49 irq_mask &= ~BIT(d->hwirq); in xtensa_irq_mask() 50 xtensa_set_sr(irq_mask, intenable); in xtensa_irq_mask() 55 u32 irq_mask; in xtensa_irq_unmask() local 57 irq_mask = xtensa_get_sr(intenable); in xtensa_irq_unmask() 58 irq_mask |= BIT(d->hwirq); in xtensa_irq_unmask() 59 xtensa_set_sr(irq_mask, intenable); in xtensa_irq_unmask() 79 .irq_mask = xtensa_irq_mask,
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D | exynos-combiner.c | 31 unsigned int irq_mask; member 78 status &= chip_data->irq_mask; in combiner_handle_cascade_irq() 109 .irq_mask = combiner_mask_irq, 129 combiner_data->irq_mask = 0xff << ((combiner_nr % 4) << 3); in combiner_init_one() 133 writel_relaxed(combiner_data->irq_mask, base + COMBINER_ENABLE_CLEAR); in combiner_init_one() 231 writel_relaxed(combiner_data[i].irq_mask, in combiner_resume()
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D | irq-ingenic-tcu.c | 30 uint32_t irq_reg, irq_mask; in ingenic_tcu_intc_cascade() local 35 regmap_read(map, TCU_REG_TMR, &irq_mask); in ingenic_tcu_intc_cascade() 39 irq_reg &= ~irq_mask; in ingenic_tcu_intc_cascade() 142 ct->chip.irq_mask = ingenic_tcu_gc_mask_disable_reg; in ingenic_tcu_irq_init()
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D | irq-or1k-pic.c | 68 .irq_mask = or1k_pic_mask, 78 .irq_mask = or1k_pic_mask, 90 .irq_mask = or1k_pic_mask,
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/linux-6.12.1/arch/mips/sgi-ip27/ |
D | ip27-irq.c | 29 u64 *irq_mask[2]; member 58 __raw_writeq(mask[0], hd->irq_mask[0]); in enable_hub_irq() 59 __raw_writeq(mask[1], hd->irq_mask[1]); in enable_hub_irq() 68 __raw_writeq(mask[0], hd->irq_mask[0]); in disable_hub_irq() 69 __raw_writeq(mask[1], hd->irq_mask[1]); in disable_hub_irq() 84 hd->irq_mask[0] = REMOTE_HUB_PTR(nasid, PI_INT_MASK0_A); in setup_hub_mask() 85 hd->irq_mask[1] = REMOTE_HUB_PTR(nasid, PI_INT_MASK1_A); in setup_hub_mask() 87 hd->irq_mask[0] = REMOTE_HUB_PTR(nasid, PI_INT_MASK0_B); in setup_hub_mask() 88 hd->irq_mask[1] = REMOTE_HUB_PTR(nasid, PI_INT_MASK1_B); in setup_hub_mask() 115 .irq_mask = disable_hub_irq,
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/linux-6.12.1/drivers/thermal/intel/ |
D | intel_bxt_pmic_thermal.c | 33 u8 irq_mask; member 53 .irq_mask = 0x01, 62 .irq_mask = 0x10, 74 .irq_mask = 0x02, 83 .irq_mask = 0x20, 95 .irq_mask = 0x04, 104 .irq_mask = 0x40, 116 .irq_mask = 0x10, 173 mask = td->maps[i].trip_config[j].irq_mask; in pmic_thermal_irq_handler()
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/linux-6.12.1/arch/alpha/kernel/ |
D | sys_rx164.c | 40 volatile unsigned int *irq_mask; in rx164_update_irq_hw() local 42 irq_mask = (void *)(POLARIS_DENSE_CONFIG_BASE + 0x74); in rx164_update_irq_hw() 43 *irq_mask = mask; in rx164_update_irq_hw() 45 *irq_mask; in rx164_update_irq_hw() 63 .irq_mask = rx164_disable_irq,
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/linux-6.12.1/arch/arm/mach-omap2/ |
D | display.c | 274 u32 v, irq_mask = 0; in dispc_disable_outputs() local 318 irq_mask |= 1 << FRAMEDONE_IRQ_SHIFT; in dispc_disable_outputs() 322 irq_mask |= 1 << FRAMEDONETV_IRQ_SHIFT; in dispc_disable_outputs() 324 irq_mask |= 1 << EVSYNC_EVEN_IRQ_SHIFT | in dispc_disable_outputs() 330 irq_mask |= 1 << FRAMEDONE2_IRQ_SHIFT; in dispc_disable_outputs() 332 irq_mask |= 1 << FRAMEDONE3_IRQ_SHIFT; in dispc_disable_outputs() 338 omap_hwmod_write(irq_mask, oh, DISPC_IRQSTATUS); in dispc_disable_outputs() 360 while ((omap_hwmod_read(oh, DISPC_IRQSTATUS) & irq_mask) != in dispc_disable_outputs() 361 irq_mask) { in dispc_disable_outputs()
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/linux-6.12.1/drivers/gpu/drm/tidss/ |
D | tidss_irq.c | 23 dispc_set_irqenable(tidss->dispc, tidss->irq_mask); in tidss_irq_update() 35 tidss->irq_mask |= DSS_IRQ_VP_VSYNC_EVEN(hw_videoport) | in tidss_irq_enable_vblank() 50 tidss->irq_mask &= ~(DSS_IRQ_VP_VSYNC_EVEN(hw_videoport) | in tidss_irq_disable_vblank() 108 tidss->irq_mask = DSS_IRQ_DEVICE_OCP_ERR; in tidss_irq_install() 113 tidss->irq_mask |= DSS_IRQ_VP_SYNC_LOST(tcrtc->hw_videoport); in tidss_irq_install() 115 tidss->irq_mask |= DSS_IRQ_VP_FRAME_DONE(tcrtc->hw_videoport); in tidss_irq_install()
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/linux-6.12.1/drivers/video/fbdev/omap2/omapfb/dss/ |
D | dispc-compat.c | 514 u32 irq_mask; in dispc_mgr_enable_digit_out() local 525 irq_mask = dispc_mgr_get_vsync_irq(OMAP_DSS_CHANNEL_DIGIT) | in dispc_mgr_enable_digit_out() 529 irq_mask); in dispc_mgr_enable_digit_out() 531 DSSERR("failed to register %x isr\n", irq_mask); in dispc_mgr_enable_digit_out() 542 irq_mask); in dispc_mgr_enable_digit_out() 544 DSSERR("failed to unregister %x isr\n", irq_mask); in dispc_mgr_enable_digit_out() 551 u32 irq_mask; in dispc_mgr_disable_digit_out() local 562 irq_mask = dispc_mgr_get_framedone_irq(OMAP_DSS_CHANNEL_DIGIT); in dispc_mgr_disable_digit_out() 565 if (!irq_mask) { in dispc_mgr_disable_digit_out() 571 irq_mask = dispc_mgr_get_vsync_irq(OMAP_DSS_CHANNEL_DIGIT); in dispc_mgr_disable_digit_out() [all …]
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/linux-6.12.1/drivers/gpu/drm/omapdrm/ |
D | omap_irq.c | 23 u32 irqmask = priv->irq_mask; in omap_irq_update() 92 priv->irq_mask |= framedone_irq; in omap_irq_enable_framedone() 94 priv->irq_mask &= ~framedone_irq; in omap_irq_enable_framedone() 123 priv->irq_mask |= dispc_mgr_get_vsync_irq(priv->dispc, in omap_irq_enable_vblank() 149 priv->irq_mask &= ~dispc_mgr_get_vsync_irq(priv->dispc, in omap_irq_disable_vblank() 177 irqstatus &= priv->irq_mask & mask; in omap_irq_fifo_underflow() 267 priv->irq_mask = DISPC_IRQ_OCP_ERR; in omap_drm_irq_install() 273 priv->irq_mask |= omap_underflow_irqs[i]; in omap_drm_irq_install() 277 priv->irq_mask |= dispc_mgr_get_sync_lost_irq(priv->dispc, i); in omap_drm_irq_install()
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/linux-6.12.1/drivers/gpu/drm/i915/gt/ |
D | gen2_engine_cs.c | 297 i915->irq_mask &= ~engine->irq_enable_mask; in gen2_irq_enable() 298 intel_uncore_write16(&i915->uncore, GEN2_IMR, i915->irq_mask); in gen2_irq_enable() 306 i915->irq_mask |= engine->irq_enable_mask; in gen2_irq_disable() 307 intel_uncore_write16(&i915->uncore, GEN2_IMR, i915->irq_mask); in gen2_irq_disable() 312 engine->i915->irq_mask &= ~engine->irq_enable_mask; in gen3_irq_enable() 313 intel_uncore_write(engine->uncore, GEN2_IMR, engine->i915->irq_mask); in gen3_irq_enable() 319 engine->i915->irq_mask |= engine->irq_enable_mask; in gen3_irq_disable() 320 intel_uncore_write(engine->uncore, GEN2_IMR, engine->i915->irq_mask); in gen3_irq_disable()
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/linux-6.12.1/drivers/i2c/busses/ |
D | i2c-cht-wc.c | 50 u8 irq_mask; member 72 reg &= ~adap->irq_mask; in cht_wc_i2c_adap_thread_handler() 233 if (adap->irq_mask != adap->old_irq_mask) { in cht_wc_i2c_irq_sync_unlock() 235 adap->irq_mask); in cht_wc_i2c_irq_sync_unlock() 237 adap->old_irq_mask = adap->irq_mask; in cht_wc_i2c_irq_sync_unlock() 249 adap->irq_mask &= ~CHT_WC_EXTCHGRIRQ_CLIENT_IRQ; in cht_wc_i2c_irq_enable() 256 adap->irq_mask |= CHT_WC_EXTCHGRIRQ_CLIENT_IRQ; in cht_wc_i2c_irq_disable() 455 adap->old_irq_mask = adap->irq_mask = ~CHT_WC_EXTCHGRIRQ_ADAP_IRQMASK; in cht_wc_i2c_adap_i2c_probe() 461 ret = regmap_write(adap->regmap, CHT_WC_EXTCHGRIRQ, ~adap->irq_mask); in cht_wc_i2c_adap_i2c_probe() 465 ret = regmap_write(adap->regmap, CHT_WC_EXTCHGRIRQ_MSK, adap->irq_mask); in cht_wc_i2c_adap_i2c_probe()
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D | i2c-nomadik.c | 512 u32 mcr, irq_mask; in read_i2c() local 530 irq_mask = (I2C_IT_RXFNF | I2C_IT_RXFF | in read_i2c() 534 irq_mask |= I2C_IT_MTD; in read_i2c() 536 irq_mask |= I2C_IT_MTDWS; in read_i2c() 538 irq_mask &= I2C_CLEAR_ALL_INTS; in read_i2c() 540 writel(readl(priv->virtbase + I2C_IMSCR) | irq_mask, in read_i2c() 577 u32 mcr, irq_mask; in write_i2c() local 596 irq_mask = (I2C_IT_TXFOVR | I2C_IT_MAL | I2C_IT_BERR); in write_i2c() 602 irq_mask |= I2C_IT_TXFNE; in write_i2c() 610 irq_mask |= I2C_IT_MTD; in write_i2c() [all …]
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/linux-6.12.1/drivers/net/wireless/mediatek/mt76/mt7996/ |
D | dma.c | 223 u32 irq_mask; in mt7996_dma_start() local 253 irq_mask = MT_INT_MCU_CMD | MT_INT_RX_DONE_MCU | MT_INT_TX_DONE_MCU; in mt7996_dma_start() 256 irq_mask |= MT_INT_BAND0_RX_DONE; in mt7996_dma_start() 259 irq_mask |= MT_INT_BAND1_RX_DONE; in mt7996_dma_start() 262 irq_mask |= MT_INT_BAND2_RX_DONE; in mt7996_dma_start() 265 u32 wed_irq_mask = irq_mask; in mt7996_dma_start() 272 irq_mask = reset ? MT_INT_MCU_CMD : irq_mask; in mt7996_dma_start() 274 mt7996_irq_enable(dev, irq_mask); in mt7996_dma_start() 379 u32 irq_mask; in mt7996_dma_rro_init() local 432 irq_mask = mdev->mmio.irqmask | MT_INT_RRO_RX_DONE | in mt7996_dma_rro_init() [all …]
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/linux-6.12.1/arch/mips/loongson2ef/lemote-2f/ |
D | pm.c | 54 int irq_mask; in setup_wakeup_events() local 61 irq_mask = inb(PIC_MASTER_IMR); in setup_wakeup_events() 67 outb(irq_mask & ~(1 << PIC_CASCADE_IR), PIC_MASTER_IMR); in setup_wakeup_events()
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/linux-6.12.1/arch/mips/sgi-ip32/ |
D | ip32-irq.c | 138 .irq_mask = crime_disable_irq, 158 .irq_mask = crime_disable_irq, 191 .irq_mask = disable_macepci_irq, 290 .irq_mask = disable_maceisa_irq, 297 .irq_mask = disable_maceisa_irq, 325 .irq_mask = disable_mace_irq,
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/linux-6.12.1/drivers/clocksource/ |
D | timer-mediatek-cpux.c | 51 const unsigned long *irq_mask = cpumask_bits(cpu_possible_mask); in mtk_cpux_set_irq() local 57 val |= *irq_mask; in mtk_cpux_set_irq() 59 val &= ~(*irq_mask); in mtk_cpux_set_irq()
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/linux-6.12.1/drivers/gpu/drm/arm/ |
D | malidp_hw.c | 947 .irq_mask = MALIDP_DE_IRQ_UNDERRUN | 957 .irq_mask = MALIDP500_SE_IRQ_CONF_MODE | 966 .irq_mask = MALIDP500_DE_IRQ_CONF_VALID, 999 .irq_mask = MALIDP_DE_IRQ_UNDERRUN | 1007 .irq_mask = MALIDP550_SE_IRQ_EOW, 1014 .irq_mask = MALIDP550_DC_IRQ_CONF_VALID | 1047 .irq_mask = MALIDP_DE_IRQ_UNDERRUN | 1061 .irq_mask = MALIDP550_SE_IRQ_EOW, 1068 .irq_mask = MALIDP550_DC_IRQ_CONF_VALID | 1206 if (!(status & de->irq_mask)) in malidp_de_irq() [all …]
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/linux-6.12.1/drivers/mfd/ |
D | ucb1x00-core.c | 303 ucb->irq_mask); in ucb1x00_irq_update() 306 ucb->irq_mask); in ucb1x00_irq_update() 320 ucb->irq_mask &= ~mask; in ucb1x00_irq_mask() 331 ucb->irq_mask |= mask; in ucb1x00_irq_unmask() 351 if (ucb->irq_mask & mask) { in ucb1x00_irq_set_type() 353 ucb->irq_mask); in ucb1x00_irq_set_type() 355 ucb->irq_mask); in ucb1x00_irq_set_type() 384 .irq_mask = ucb1x00_irq_mask, 713 ucb->irq_mask); in ucb1x00_resume() 715 ucb->irq_mask); in ucb1x00_resume()
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/linux-6.12.1/drivers/gpu/drm/vmwgfx/ |
D | vmwgfx_irq.c | 95 masked_status = status & READ_ONCE(dev_priv->irq_mask); in vmw_irq_handler() 248 dev_priv->irq_mask |= flag; in vmw_generic_waiter_add() 249 vmw_write(dev_priv, SVGA_REG_IRQMASK, dev_priv->irq_mask); in vmw_generic_waiter_add() 259 dev_priv->irq_mask &= ~flag; in vmw_generic_waiter_remove() 260 vmw_write(dev_priv, SVGA_REG_IRQMASK, dev_priv->irq_mask); in vmw_generic_waiter_remove()
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/linux-6.12.1/drivers/media/pci/solo6x10/ |
D | solo6x10.h | 191 u32 irq_mask; member 291 dev->irq_mask |= mask; in solo_irq_on() 292 solo_reg_write(dev, SOLO_IRQ_MASK, dev->irq_mask); in solo_irq_on() 297 dev->irq_mask &= ~mask; in solo_irq_off() 298 solo_reg_write(dev, SOLO_IRQ_MASK, dev->irq_mask); in solo_irq_off()
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/linux-6.12.1/drivers/gpio/ |
D | gpio-max732x.c | 146 uint8_t irq_mask; member 319 if (chip->irq_mask == chip->irq_mask_cur) in max732x_irq_update_mask() 322 chip->irq_mask = chip->irq_mask_cur; in max732x_irq_update_mask() 331 msg = (chip->irq_mask << 8) | chip->reg_out[0]; in max732x_irq_update_mask() 336 msg = chip->irq_mask | chip->reg_out[0]; in max732x_irq_update_mask() 368 chip->irq_mask_cur = chip->irq_mask; in max732x_irq_bus_lock() 432 .irq_mask = max732x_irq_mask, 456 trigger &= chip->irq_mask; in max732x_irq_pending() 462 cur_stat &= chip->irq_mask; in max732x_irq_pending()
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/linux-6.12.1/drivers/watchdog/ |
D | aspeed_wdt.c | 28 u32 irq_mask; member 41 .irq_mask = 0, 47 .irq_mask = GENMASK(31, 12), 53 .irq_mask = GENMASK(31, 10), 189 u32 m = wdt->cfg->irq_mask; in aspeed_wdt_set_pretimeout() 335 if (wdt->cfg->irq_mask) { in aspeed_wdt_probe()
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/linux-6.12.1/drivers/ata/ |
D | pata_cmd64x.c | 242 int irq_mask = ap->port_no ? ARTTIM23_INTR_CH1 : CFR_INTR_CH0; in cmd64x_sff_irq_check() local 249 return irq_stat & irq_mask; in cmd64x_sff_irq_check() 282 int irq_mask = ap->port_no ? MRDMODE_INTR_CH1 : MRDMODE_INTR_CH0; in cmd648_sff_irq_check() local 285 return mrdmode & irq_mask; in cmd648_sff_irq_check() 299 int irq_mask = ap->port_no ? MRDMODE_INTR_CH1 : MRDMODE_INTR_CH0; in cmd648_sff_irq_clear() local 307 outb(mrdmode | irq_mask, base + 1); in cmd648_sff_irq_clear()
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