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Searched refs:ios (Results 1 – 25 of 117) sorted by relevance

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/linux-6.12.1/drivers/mmc/core/
Ddebugfs.c59 struct mmc_ios *ios = &host->ios; in mmc_ios_show() local
62 seq_printf(s, "clock:\t\t%u Hz\n", ios->clock); in mmc_ios_show()
65 seq_printf(s, "vdd:\t\t%u ", ios->vdd); in mmc_ios_show()
66 if ((1 << ios->vdd) & MMC_VDD_165_195) in mmc_ios_show()
68 else if (ios->vdd < (ARRAY_SIZE(vdd_str) - 1) in mmc_ios_show()
69 && vdd_str[ios->vdd] && vdd_str[ios->vdd + 1]) in mmc_ios_show()
70 seq_printf(s, "(%s ~ %s V)\n", vdd_str[ios->vdd], in mmc_ios_show()
71 vdd_str[ios->vdd + 1]); in mmc_ios_show()
75 switch (ios->bus_mode) { in mmc_ios_show()
86 seq_printf(s, "bus mode:\t%u (%s)\n", ios->bus_mode, str); in mmc_ios_show()
[all …]
Dhost.h68 return card->host->ios.timing == MMC_TIMING_MMC_HS200; in mmc_card_hs200()
73 return card->host->ios.timing == MMC_TIMING_MMC_DDR52; in mmc_card_ddr52()
78 return card->host->ios.timing == MMC_TIMING_MMC_HS400; in mmc_card_hs400()
83 return card->host->ios.enhanced_strobe; in mmc_card_hs400es()
88 return host->ios.timing == MMC_TIMING_SD_EXP || in mmc_card_sd_express()
89 host->ios.timing == MMC_TIMING_SD_EXP_1_2V; in mmc_card_sd_express()
Dcore.c688 if (card->host->ios.clock) in mmc_set_data_timeout()
690 (card->host->ios.clock / 1000); in mmc_set_data_timeout()
890 struct mmc_ios *ios = &host->ios; in mmc_set_ios() local
894 mmc_hostname(host), ios->clock, ios->bus_mode, in mmc_set_ios()
895 ios->power_mode, ios->chip_select, ios->vdd, in mmc_set_ios()
896 1 << ios->bus_width, ios->timing); in mmc_set_ios()
898 host->ops->set_ios(host, ios); in mmc_set_ios()
906 host->ios.chip_select = mode; in mmc_set_chip_select()
921 host->ios.clock = hz; in mmc_set_clock()
964 host->ios.bus_mode = mode; in mmc_set_bus_mode()
[all …]
/linux-6.12.1/drivers/mmc/host/
Ddw_mmc-k3.c102 static void dw_mci_k3_set_ios(struct dw_mci *host, struct mmc_ios *ios) in dw_mci_k3_set_ios() argument
106 ret = clk_set_rate(host->ciu_clk, ios->clock); in dw_mci_k3_set_ios()
108 dev_warn(host->dev, "failed to set rate %uHz\n", ios->clock); in dw_mci_k3_set_ios()
141 static int dw_mci_hi6220_switch_voltage(struct mmc_host *mmc, struct mmc_ios *ios) in dw_mci_hi6220_switch_voltage() argument
155 if (ios->signal_voltage == MMC_SIGNAL_VOLTAGE_330) { in dw_mci_hi6220_switch_voltage()
160 } else if (ios->signal_voltage == MMC_SIGNAL_VOLTAGE_180) { in dw_mci_hi6220_switch_voltage()
188 static void dw_mci_hi6220_set_ios(struct dw_mci *host, struct mmc_ios *ios) in dw_mci_hi6220_set_ios() argument
193 clock = (ios->clock <= 25000000) ? 25000000 : ios->clock; in dw_mci_hi6220_set_ios()
297 static void dw_mci_hi3660_set_ios(struct dw_mci *host, struct mmc_ios *ios) in dw_mci_hi3660_set_ios() argument
304 if (!ios->clock || ios->clock == priv->cur_speed) in dw_mci_hi3660_set_ios()
[all …]
Ddw_mmc-starfive.c26 static void dw_mci_starfive_set_ios(struct dw_mci *host, struct mmc_ios *ios) in dw_mci_starfive_set_ios() argument
31 if (ios->timing == MMC_TIMING_MMC_DDR52 || ios->timing == MMC_TIMING_UHS_DDR50) { in dw_mci_starfive_set_ios()
32 clock = (ios->clock > 50000000 && ios->clock <= 52000000) ? 100000000 : ios->clock; in dw_mci_starfive_set_ios()
35 dev_dbg(host->dev, "Use an external frequency divider %uHz\n", ios->clock); in dw_mci_starfive_set_ios()
Ddw_mmc-hi3798cv200.c26 static void dw_mci_hi3798cv200_set_ios(struct dw_mci *host, struct mmc_ios *ios) in dw_mci_hi3798cv200_set_ios() argument
32 if (ios->timing == MMC_TIMING_MMC_DDR52 || in dw_mci_hi3798cv200_set_ios()
33 ios->timing == MMC_TIMING_UHS_DDR50) in dw_mci_hi3798cv200_set_ios()
40 if (ios->timing == MMC_TIMING_MMC_DDR52) in dw_mci_hi3798cv200_set_ios()
47 if (ios->timing == MMC_TIMING_MMC_HS400) in dw_mci_hi3798cv200_set_ios()
53 if (ios->timing == MMC_TIMING_MMC_HS || in dw_mci_hi3798cv200_set_ios()
54 ios->timing == MMC_TIMING_LEGACY) in dw_mci_hi3798cv200_set_ios()
56 else if (ios->timing == MMC_TIMING_MMC_HS200) in dw_mci_hi3798cv200_set_ios()
Ddw_mmc-hi3798mv200.c36 static void dw_mci_hi3798mv200_set_ios(struct dw_mci *host, struct mmc_ios *ios) in dw_mci_hi3798mv200_set_ios() argument
39 struct mmc_clk_phase phase = priv->phase_map.phase[ios->timing]; in dw_mci_hi3798mv200_set_ios()
43 if (ios->timing == MMC_TIMING_MMC_DDR52 in dw_mci_hi3798mv200_set_ios()
44 || ios->timing == MMC_TIMING_UHS_DDR50) in dw_mci_hi3798mv200_set_ios()
51 if (ios->timing == MMC_TIMING_MMC_HS400) in dw_mci_hi3798mv200_set_ios()
57 if (clk_set_rate(host->ciu_clk, ios->clock)) in dw_mci_hi3798mv200_set_ios()
58 dev_warn(host->dev, "Failed to set rate to %u\n", ios->clock); in dw_mci_hi3798mv200_set_ios()
73 ios->timing); in dw_mci_hi3798mv200_set_ios()
Dmmci_stm32_sdmmc.c302 if (host->mmc->ios.timing == MMC_TIMING_MMC_DDR52 || in mmci_sdmmc_set_clkreg()
303 host->mmc->ios.timing == MMC_TIMING_UHS_DDR50) in mmci_sdmmc_set_clkreg()
331 if (host->mmc->ios.power_mode == MMC_POWER_ON) in mmci_sdmmc_set_clkreg()
336 if (host->mmc->ios.bus_width == MMC_BUS_WIDTH_4) in mmci_sdmmc_set_clkreg()
338 if (host->mmc->ios.bus_width == MMC_BUS_WIDTH_8) in mmci_sdmmc_set_clkreg()
345 if (host->mmc->ios.timing >= MMC_TIMING_UHS_SDR50) in mmci_sdmmc_set_clkreg()
362 struct mmc_ios ios = host->mmc->ios; in mmci_sdmmc_set_pwrreg() local
371 if (ios.power_mode == MMC_POWER_OFF) { in mmci_sdmmc_set_pwrreg()
384 } else if (ios.power_mode == MMC_POWER_ON) { in mmci_sdmmc_set_pwrreg()
417 if (host->mmc->ios.timing == MMC_TIMING_UHS_SDR104 || in sdmmc_get_dctrl_cfg()
[all …]
Dalcor.c692 static void alcor_set_timing(struct mmc_host *mmc, struct mmc_ios *ios) in alcor_set_timing() argument
696 if (ios->timing == MMC_TIMING_LEGACY) { in alcor_set_timing()
705 static void alcor_set_bus_width(struct mmc_host *mmc, struct mmc_ios *ios) in alcor_set_bus_width() argument
710 if (ios->bus_width == MMC_BUS_WIDTH_1) { in alcor_set_bus_width()
712 } else if (ios->bus_width == MMC_BUS_WIDTH_4) { in alcor_set_bus_width()
845 static void alcor_set_power_mode(struct mmc_host *mmc, struct mmc_ios *ios) in alcor_set_power_mode() argument
850 switch (ios->power_mode) { in alcor_set_power_mode()
852 alcor_set_clock(host, ios->clock); in alcor_set_power_mode()
880 alcor_set_clock(host, ios->clock); in alcor_set_power_mode()
887 alcor_set_clock(host, ios->clock); in alcor_set_power_mode()
[all …]
Dowl-mmc.c427 static void owl_mmc_set_clk(struct owl_mmc_host *owl_host, struct mmc_ios *ios) in owl_mmc_set_clk() argument
429 if (!ios->clock) in owl_mmc_set_clk()
432 owl_host->clock = ios->clock; in owl_mmc_set_clk()
433 owl_mmc_set_clk_rate(owl_host, ios->clock); in owl_mmc_set_clk()
437 struct mmc_ios *ios) in owl_mmc_set_bus_width() argument
443 switch (ios->bus_width) { in owl_mmc_set_bus_width()
485 static void owl_mmc_set_ios(struct mmc_host *mmc, struct mmc_ios *ios) in owl_mmc_set_ios() argument
489 switch (ios->power_mode) { in owl_mmc_set_ios()
518 if (ios->clock != owl_host->clock) in owl_mmc_set_ios()
519 owl_mmc_set_clk(owl_host, ios); in owl_mmc_set_ios()
[all …]
Dsdhci-pci-arasan.c250 if (arasan_host->chg_clk == host->mmc->ios.clock) in arasan_select_phy_clock()
253 arasan_host->chg_clk = host->mmc->ios.clock; in arasan_select_phy_clock()
254 if (host->mmc->ios.clock == 200000000) in arasan_select_phy_clock()
256 else if (host->mmc->ios.clock == 100000000) in arasan_select_phy_clock()
258 else if (host->mmc->ios.clock == 50000000) in arasan_select_phy_clock()
267 switch (host->mmc->ios.timing) { in arasan_select_phy_clock()
280 host->mmc->ios.drv_type, 0x0, in arasan_select_phy_clock()
290 host->mmc->ios.drv_type, 0xa, in arasan_select_phy_clock()
Dsunxi-mmc.c723 struct mmc_ios *ios, u32 rate) in sunxi_mmc_clk_set_phase() argument
741 if (ios->timing != MMC_TIMING_UHS_DDR50 && in sunxi_mmc_clk_set_phase()
742 ios->timing != MMC_TIMING_MMC_DDR52) { in sunxi_mmc_clk_set_phase()
744 } else if (ios->bus_width == MMC_BUS_WIDTH_8) { in sunxi_mmc_clk_set_phase()
761 struct mmc_ios *ios) in sunxi_mmc_clk_set_rate() argument
765 u32 rval, clock = ios->clock, div = 1; in sunxi_mmc_clk_set_rate()
775 if (!ios->clock) in sunxi_mmc_clk_set_rate()
787 if (ios->timing == MMC_TIMING_MMC_DDR52 && in sunxi_mmc_clk_set_rate()
789 ios->bus_width == MMC_BUS_WIDTH_8)) { in sunxi_mmc_clk_set_rate()
843 ret = sunxi_mmc_clk_set_phase(host, ios, rate); in sunxi_mmc_clk_set_rate()
[all …]
Ddw_mmc-rockchip.c174 static void dw_mci_rk3288_set_ios(struct dw_mci *host, struct mmc_ios *ios) in dw_mci_rk3288_set_ios() argument
181 if (ios->clock == 0) in dw_mci_rk3288_set_ios()
193 if (ios->bus_width == MMC_BUS_WIDTH_8 && in dw_mci_rk3288_set_ios()
194 ios->timing == MMC_TIMING_MMC_DDR52) in dw_mci_rk3288_set_ios()
195 cclkin = 2 * ios->clock * RK3288_CLKGEN_DIV; in dw_mci_rk3288_set_ios()
197 cclkin = ios->clock * RK3288_CLKGEN_DIV; in dw_mci_rk3288_set_ios()
211 if (!IS_ERR(priv->sample_clk) && ios->timing <= MMC_TIMING_SD_HS) in dw_mci_rk3288_set_ios()
251 switch (ios->timing) { in dw_mci_rk3288_set_ios()
258 if (ios->bus_width == MMC_BUS_WIDTH_8) in dw_mci_rk3288_set_ios()
Dsdhci-msm.c339 struct mmc_ios ios = host->mmc->ios; in msm_get_clock_mult_for_bus_mode() local
346 if (ios.timing == MMC_TIMING_UHS_DDR50 || in msm_get_clock_mult_for_bus_mode()
347 ios.timing == MMC_TIMING_MMC_DDR52 || in msm_get_clock_mult_for_bus_mode()
348 ios.timing == MMC_TIMING_MMC_HS400 || in msm_get_clock_mult_for_bus_mode()
359 struct mmc_ios curr_ios = host->mmc->ios; in msm_set_clock_rate_for_bus_mode()
823 struct mmc_ios ios = host->mmc->ios; in msm_hc_select_hs400() local
839 if ((msm_host->tuning_done || ios.enhanced_strobe) && in msm_hc_select_hs400()
892 struct mmc_ios ios = host->mmc->ios; in sdhci_msm_hc_select_mode() local
894 if (ios.timing == MMC_TIMING_MMC_HS400 || in sdhci_msm_hc_select_mode()
1029 if (mmc->ios.enhanced_strobe) { in sdhci_msm_cm_dll_sdc4_calibration()
[all …]
Domap_hsmmc.c220 struct mmc_ios *ios = &mmc->ios; in omap_hsmmc_enable_supply() local
223 ret = mmc_regulator_set_ocr(mmc, mmc->supply.vmmc, ios->vdd); in omap_hsmmc_enable_supply()
520 static u16 calc_divisor(struct omap_hsmmc_host *host, struct mmc_ios *ios) in calc_divisor() argument
524 if (ios->clock) { in calc_divisor()
525 dsor = DIV_ROUND_UP(clk_get_rate(host->fclk), ios->clock); in calc_divisor()
535 struct mmc_ios *ios = &host->mmc->ios; in omap_hsmmc_set_clock() local
540 dev_vdbg(mmc_dev(host->mmc), "Set clock to %uHz\n", ios->clock); in omap_hsmmc_set_clock()
546 clkdiv = calc_divisor(host, ios); in omap_hsmmc_set_clock()
568 (ios->timing != MMC_TIMING_MMC_DDR52) && in omap_hsmmc_set_clock()
569 (ios->timing != MMC_TIMING_UHS_DDR50) && in omap_hsmmc_set_clock()
[all …]
Dsdhci-sprd.c376 if (!mmc->ios.enhanced_strobe) in sdhci_sprd_set_uhs_signaling()
494 static int sdhci_sprd_voltage_switch(struct mmc_host *mmc, struct mmc_ios *ios) in sdhci_sprd_voltage_switch() argument
501 ret = mmc_regulator_set_vqmmc(mmc, ios); in sdhci_sprd_voltage_switch()
512 switch (ios->signal_voltage) { in sdhci_sprd_voltage_switch()
546 struct mmc_ios *ios) in sdhci_sprd_hs400_enhanced_strobe() argument
553 if (!ios->enhanced_strobe) in sdhci_sprd_hs400_enhanced_strobe()
649 dll_dly = p[mmc->ios.timing]; in sdhci_sprd_tuning()
676 p[mmc->ios.timing] &= ~SDHCI_SPRD_CMD_DLY_MASK; in sdhci_sprd_tuning()
677 p[mmc->ios.timing] |= ((best_clk_sample << 8) & SDHCI_SPRD_CMD_DLY_MASK); in sdhci_sprd_tuning()
679 p[mmc->ios.timing] &= ~(SDHCI_SPRD_POSRD_DLY_MASK); in sdhci_sprd_tuning()
[all …]
Dsdhci.c382 mmc->ops->set_ios(mmc, &mmc->ios); in sdhci_init()
937 struct mmc_ios *ios = &mmc->ios; in sdhci_calc_sw_timeout() local
938 unsigned char bus_width = 1 << ios->bus_width; in sdhci_calc_sw_timeout()
2307 static bool sdhci_presetable_values_change(struct sdhci_host *host, struct mmc_ios *ios) in sdhci_presetable_values_change() argument
2315 (sdhci_preset_needed(host, ios->timing) || host->drv_type != ios->drv_type); in sdhci_presetable_values_change()
2318 void sdhci_set_ios(struct mmc_host *mmc, struct mmc_ios *ios) in sdhci_set_ios() argument
2327 if (ios->power_mode == MMC_POWER_UNDEFINED) in sdhci_set_ios()
2332 ios->power_mode == MMC_POWER_OFF) in sdhci_set_ios()
2341 if (ios->power_mode == MMC_POWER_OFF) { in sdhci_set_ios()
2347 (ios->power_mode == MMC_POWER_UP) && in sdhci_set_ios()
[all …]
Dmmc_spi.c1036 static void mmc_spi_set_ios(struct mmc_host *mmc, struct mmc_ios *ios) in mmc_spi_set_ios() argument
1040 if (host->power_mode != ios->power_mode) { in mmc_spi_set_ios()
1046 mmc_powerstring(ios->power_mode), in mmc_spi_set_ios()
1047 ios->vdd, in mmc_spi_set_ios()
1054 switch (ios->power_mode) { in mmc_spi_set_ios()
1058 ios->vdd); in mmc_spi_set_ios()
1059 if (ios->power_mode == MMC_POWER_UP) in mmc_spi_set_ios()
1065 if (ios->power_mode == MMC_POWER_ON) in mmc_spi_set_ios()
1077 if (canpower && ios->power_mode == MMC_POWER_OFF) { in mmc_spi_set_ios()
1110 host->power_mode = ios->power_mode; in mmc_spi_set_ios()
[all …]
Dmvsdio.c598 static void mvsd_set_ios(struct mmc_host *mmc, struct mmc_ios *ios) in mvsd_set_ios() argument
604 if (ios->power_mode == MMC_POWER_UP) in mvsd_set_ios()
607 if (ios->clock == 0) { in mvsd_set_ios()
612 } else if (ios->clock != host->clock) { in mvsd_set_ios()
613 u32 m = DIV_ROUND_UP(host->base_clock, ios->clock) - 1; in mvsd_set_ios()
617 host->clock = ios->clock; in mvsd_set_ios()
620 ios->clock, host->base_clock / (m+1), m); in mvsd_set_ios()
631 if (ios->bus_mode == MMC_BUSMODE_PUSHPULL) in mvsd_set_ios()
634 if (ios->bus_width == MMC_BUS_WIDTH_4) in mvsd_set_ios()
645 if (ios->timing == MMC_TIMING_MMC_HS || in mvsd_set_ios()
[all …]
Dpxamci.c440 static void pxamci_set_ios(struct mmc_host *mmc, struct mmc_ios *ios) in pxamci_set_ios() argument
444 if (ios->clock) { in pxamci_set_ios()
446 unsigned int clk = rate / ios->clock; in pxamci_set_ios()
451 if (ios->clock == 26000000) { in pxamci_set_ios()
464 if (rate / clk > ios->clock) in pxamci_set_ios()
480 if (host->power_mode != ios->power_mode) { in pxamci_set_ios()
483 host->power_mode = ios->power_mode; in pxamci_set_ios()
485 ret = pxamci_set_power(host, ios->power_mode, ios->vdd); in pxamci_set_ios()
497 if (ios->power_mode == MMC_POWER_ON) in pxamci_set_ios()
501 if (ios->bus_width == MMC_BUS_WIDTH_4) in pxamci_set_ios()
Dsdhci-xenon.c278 static void xenon_set_ios(struct mmc_host *mmc, struct mmc_ios *ios) in xenon_set_ios() argument
292 if ((ios->timing == MMC_TIMING_MMC_HS400) || in xenon_set_ios()
293 (ios->timing == MMC_TIMING_MMC_HS200) || in xenon_set_ios()
294 (ios->timing == MMC_TIMING_MMC_HS)) { in xenon_set_ios()
306 sdhci_set_ios(mmc, ios); in xenon_set_ios()
307 xenon_phy_adj(host, ios); in xenon_set_ios()
314 struct mmc_ios *ios) in xenon_start_signal_voltage_switch() argument
330 xenon_soc_pad_ctrl(host, ios->signal_voltage); in xenon_start_signal_voltage_switch()
340 return sdhci_start_signal_voltage_switch(mmc, ios); in xenon_start_signal_voltage_switch()
Dusdhi6rol0.c727 static void usdhi6_clk_set(struct usdhi6_host *host, struct mmc_ios *ios) in usdhi6_clk_set() argument
729 unsigned long rate = ios->clock; in usdhi6_clk_set()
750 if (ios->timing != MMC_TIMING_UHS_DDR50) { in usdhi6_clk_set()
794 static void usdhi6_set_power(struct usdhi6_host *host, struct mmc_ios *ios) in usdhi6_set_power() argument
801 ios->power_mode ? ios->vdd : 0); in usdhi6_set_power()
818 static void usdhi6_set_ios(struct mmc_host *mmc, struct mmc_ios *ios) in usdhi6_set_ios() argument
825 ios->clock, ios->vdd, ios->power_mode, ios->bus_width, ios->timing); in usdhi6_set_ios()
827 switch (ios->power_mode) { in usdhi6_set_ios()
829 usdhi6_set_power(host, ios); in usdhi6_set_ios()
841 usdhi6_set_power(host, ios); in usdhi6_set_ios()
[all …]
/linux-6.12.1/include/linux/mmc/
Dhost.h147 void (*set_ios)(struct mmc_host *host, struct mmc_ios *ios);
174 int (*start_signal_voltage_switch)(struct mmc_host *host, struct mmc_ios *ios);
183 int (*prepare_hs400_tuning)(struct mmc_host *host, struct mmc_ios *ios);
205 struct mmc_ios *ios);
221 int (*init_sd_express)(struct mmc_host *host, struct mmc_ios *ios);
424 struct mmc_ios ios; /* current io bus settings */ member
569 int mmc_regulator_set_vqmmc(struct mmc_host *mmc, struct mmc_ios *ios);
579 struct mmc_ios *ios) in mmc_regulator_set_vqmmc() argument
607 return card->host->ios.timing == MMC_TIMING_SD_HS || in mmc_card_hs()
608 card->host->ios.timing == MMC_TIMING_MMC_HS; in mmc_card_hs()
[all …]
/linux-6.12.1/drivers/net/wireless/rsi/
Drsi_91x_sdio.c186 host->ios.chip_select = MMC_CS_DONTCARE; in rsi_reset_card()
187 host->ios.bus_mode = MMC_BUSMODE_OPENDRAIN; in rsi_reset_card()
188 host->ios.power_mode = MMC_POWER_UP; in rsi_reset_card()
189 host->ios.bus_width = MMC_BUS_WIDTH_1; in rsi_reset_card()
190 host->ios.timing = MMC_TIMING_LEGACY; in rsi_reset_card()
191 host->ops->set_ios(host, &host->ios); in rsi_reset_card()
199 host->ios.clock = host->f_min; in rsi_reset_card()
200 host->ios.power_mode = MMC_POWER_ON; in rsi_reset_card()
201 host->ops->set_ios(host, &host->ios); in rsi_reset_card()
210 host->ios.chip_select = MMC_CS_HIGH; in rsi_reset_card()
[all …]
/linux-6.12.1/drivers/staging/greybus/
Dsdio.c588 static void gb_mmc_set_ios(struct mmc_host *mmc, struct mmc_ios *ios) in gb_mmc_set_ios() argument
601 request.clock = cpu_to_le32(ios->clock); in gb_mmc_set_ios()
603 if (ios->vdd) in gb_mmc_set_ios()
604 vdd = 1 << (ios->vdd - GB_SDIO_VDD_SHIFT); in gb_mmc_set_ios()
607 request.bus_mode = ios->bus_mode == MMC_BUSMODE_OPENDRAIN ? in gb_mmc_set_ios()
611 switch (ios->power_mode) { in gb_mmc_set_ios()
628 switch (ios->bus_width) { in gb_mmc_set_ios()
642 switch (ios->timing) { in gb_mmc_set_ios()
680 switch (ios->signal_voltage) { in gb_mmc_set_ios()
694 switch (ios->drv_type) { in gb_mmc_set_ios()
[all …]

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