/linux-6.12.1/drivers/net/ethernet/freescale/fman/ |
D | fman_dtsec.c | 472 iowrite32be(ioread32be(reg) | bit_mask, reg); in set_bucket() 474 iowrite32be(ioread32be(reg) & (~bit_mask), reg); in set_bucket() 584 return (u16)ioread32be(®s->maxfrm); in dtsec_get_max_frame_length() 594 event = ioread32be(®s->ievent) & in dtsec_isr() 597 event &= ioread32be(®s->imask); in dtsec_isr() 627 tpkt1 = ioread32be(®s->tpkt); in dtsec_isr() 630 tmp_reg1 = ioread32be(®s->reserved02c0[27]); in dtsec_isr() 651 tpkt2 = ioread32be(®s->tpkt); in dtsec_isr() 652 tmp_reg2 = ioread32be(®s->reserved02c0[27]); in dtsec_isr() 668 iowrite32be(ioread32be(®s->rctrl) | in dtsec_isr() [all …]
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D | fman.c | 620 tmp = ioread32be(&fman->dma_regs->fmdmplr[port_id / 2]); in set_port_liodn() 635 tmp = ioread32be(&fpm_rg->fm_rcr); in enable_rams_ecc() 647 tmp = ioread32be(&fpm_rg->fm_rcr); in disable_rams_ecc() 691 iowrite32be(ioread32be(&dma_rg->fmdmsr) | tmp_reg, &dma_rg->fmdmsr); in dma_init() 956 tmp = ioread32be(&fman->dma_regs->fmdmmr); in set_exception() 967 tmp = ioread32be(&fman->dma_regs->fmdmmr); in set_exception() 975 tmp = ioread32be(&fman->fpm_regs->fmfp_ee); in set_exception() 983 tmp = ioread32be(&fman->fpm_regs->fmfp_ee); in set_exception() 991 tmp = ioread32be(&fman->fpm_regs->fmfp_ee); in set_exception() 999 tmp = ioread32be(&fman->qmi_regs->fmqm_ien); in set_exception() [all …]
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D | fman_memac.c | 322 tmp = ioread32be(®s->command_config); in reset() 331 } while ((ioread32be(®s->command_config) & CMD_CFG_SW_RESET) && in reset() 345 tmp = ioread32be(®s->imask); in set_exception() 466 event = ioread32be(®s->ievent); in memac_err_exception() 467 imask = ioread32be(®s->imask); in memac_err_exception() 492 event = ioread32be(®s->ievent); in memac_exception() 493 imask = ioread32be(®s->imask); in memac_exception() 558 tmp = ioread32be(®s->command_config); in memac_set_promiscuous() 575 tmp = ioread32be(®s->tx_fifo_sections); in memac_set_tx_pause_frames() 580 tmp = ioread32be(®s->command_config); in memac_set_tx_pause_frames() [all …]
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D | fman_tgec.c | 240 iowrite32be(ioread32be(®s->imask) | exception_mask, ®s->imask); in init() 330 event = ioread32be(®s->ievent) & in tgec_err_exception() 334 event &= ioread32be(®s->imask); in tgec_err_exception() 398 tmp = ioread32be(®s->command_config); in tgec_set_promiscuous() 424 tmp = ioread32be(®s->command_config); in tgec_accept_rx_pause_frames() 454 tmp = ioread32be(®s->command_config); in tgec_link_up() 466 tmp = ioread32be(®s->command_config); in tgec_link_down() 546 tmp = ioread32be(®s->command_config); in tgec_set_tstamp() 610 iowrite32be(ioread32be(®s->imask) | bit_mask, ®s->imask); in tgec_set_exception() 612 iowrite32be(ioread32be(®s->imask) & ~bit_mask, ®s->imask); in tgec_set_exception() [all …]
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/linux-6.12.1/drivers/staging/vme_user/ |
D | vme_tsi148.c | 126 val = ioread32be(bridge->base + TSI148_GCSR_MBOX[i]); in tsi148_MB_irqhandler() 146 ioread32be(bridge->base + TSI148_LCSR_EDPAU), in tsi148_PERR_irqhandler() 147 ioread32be(bridge->base + TSI148_LCSR_EDPAL), in tsi148_PERR_irqhandler() 148 ioread32be(bridge->base + TSI148_LCSR_EDPAT)); in tsi148_PERR_irqhandler() 151 ioread32be(bridge->base + TSI148_LCSR_EDPXA), in tsi148_PERR_irqhandler() 152 ioread32be(bridge->base + TSI148_LCSR_EDPXS)); in tsi148_PERR_irqhandler() 172 error_addr_high = ioread32be(bridge->base + TSI148_LCSR_VEAU); in tsi148_VERR_irqhandler() 173 error_addr_low = ioread32be(bridge->base + TSI148_LCSR_VEAL); in tsi148_VERR_irqhandler() 174 error_attrib = ioread32be(bridge->base + TSI148_LCSR_VEAT); in tsi148_VERR_irqhandler() 250 enable = ioread32be(bridge->base + TSI148_LCSR_INTEO); in tsi148_irqhandler() [all …]
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/linux-6.12.1/arch/powerpc/platforms/86xx/ |
D | gef_ppc9a.c | 100 reg = ioread32be(ppc9a_regs); in gef_ppc9a_get_pcb_rev() 109 reg = ioread32be(ppc9a_regs); in gef_ppc9a_get_board_rev() 118 reg = ioread32be(ppc9a_regs); in gef_ppc9a_get_fpga_rev() 127 reg = ioread32be(ppc9a_regs + 0x4); in gef_ppc9a_get_vme_geo_addr() 136 reg = ioread32be(ppc9a_regs + 0x4); in gef_ppc9a_get_vme_is_syscon()
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/linux-6.12.1/drivers/net/ethernet/mellanox/mlx5/core/ |
D | health.c | 72 return (ioread32be(&dev->iseg->cmdq_addr_l_sz) >> 8) & 7; in mlx5_get_nic_state() 79 cur_cmdq_addr_l_sz = ioread32be(&dev->iseg->cmdq_addr_l_sz); in mlx5_set_nic_state() 91 return (ioread32be(&h->fw_ver) == 0xffffffff); in sensor_pci_not_working() 164 bool supported = (ioread32be(&dev->iseg->initializing) >> in reset_fw_if_needed() 424 if (ioread32be(&h->fw_ver) == 0xFFFFFFFF) { in print_health_info() 436 ioread32be(h->assert_var + i)); in print_health_info() 438 mlx5_log(dev, severity, "assert_exit_ptr 0x%08x\n", ioread32be(&h->assert_exit_ptr)); in print_health_info() 439 mlx5_log(dev, severity, "assert_callra 0x%08x\n", ioread32be(&h->assert_callra)); in print_health_info() 442 mlx5_log(dev, severity, "time %u\n", ioread32be(&h->time)); in print_health_info() 443 mlx5_log(dev, severity, "hw_id 0x%08x\n", ioread32be(&h->hw_id)); in print_health_info() [all …]
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/linux-6.12.1/drivers/gpio/ |
D | gpio-hlwd.c | 70 pending = ioread32be(hlwd->regs + HW_GPIOB_INTFLAG); in hlwd_gpio_irqhandler() 71 pending &= ioread32be(hlwd->regs + HW_GPIOB_INTMASK); in hlwd_gpio_irqhandler() 79 level = ioread32be(hlwd->regs + HW_GPIOB_INTLVL); in hlwd_gpio_irqhandler() 123 mask = ioread32be(hlwd->regs + HW_GPIOB_INTMASK); in hlwd_gpio_irq_mask() 139 mask = ioread32be(hlwd->regs + HW_GPIOB_INTMASK); in hlwd_gpio_irq_unmask() 157 level = ioread32be(hlwd->regs + HW_GPIOB_INTLVL); in hlwd_gpio_irq_setup_emulation() 158 state = ioread32be(hlwd->regs + HW_GPIOB_IN) & BIT(hwirq); in hlwd_gpio_irq_setup_emulation() 185 level = ioread32be(hlwd->regs + HW_GPIOB_INTLVL); in hlwd_gpio_irq_set_type() 190 level = ioread32be(hlwd->regs + HW_GPIOB_INTLVL); in hlwd_gpio_irq_set_type()
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/linux-6.12.1/drivers/input/serio/ |
D | apbps2.c | 65 while ((status = ioread32be(&priv->regs->status)) & APBPS2_STATUS_DR) { in apbps2_isr() 66 data = ioread32be(&priv->regs->data); in apbps2_isr() 88 while ((ioread32be(&priv->regs->status) & APBPS2_STATUS_TF) && tleft--) in apbps2_write() 91 if ((ioread32be(&priv->regs->status) & APBPS2_STATUS_TF) == 0) { in apbps2_write() 112 while ((ioread32be(&priv->regs->status) & APBPS2_STATUS_DR) && --limit) in apbps2_open() 113 ioread32be(&priv->regs->data); in apbps2_open()
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/linux-6.12.1/drivers/soc/fsl/qe/ |
D | qe_io.c | 59 tmp_val = ioread32be(&par_io->cpodr); in __par_io_config_pin() 67 ioread32be(&par_io->cpdir2) : in __par_io_config_pin() 68 ioread32be(&par_io->cpdir1); in __par_io_config_pin() 90 ioread32be(&par_io->cppar2) : in __par_io_config_pin() 91 ioread32be(&par_io->cppar1); in __par_io_config_pin() 131 tmp_val = ioread32be(&par_io[port].cpdata); in par_io_data_set()
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D | ucc_fast.c | 32 &uccf->uf_regs->gumr, ioread32be(&uccf->uf_regs->gumr)); in ucc_fast_dump_regs() 34 &uccf->uf_regs->upsmr, ioread32be(&uccf->uf_regs->upsmr)); in ucc_fast_dump_regs() 40 &uccf->uf_regs->ucce, ioread32be(&uccf->uf_regs->ucce)); in ucc_fast_dump_regs() 42 &uccf->uf_regs->uccm, ioread32be(&uccf->uf_regs->uccm)); in ucc_fast_dump_regs() 46 &uccf->uf_regs->urfb, ioread32be(&uccf->uf_regs->urfb)); in ucc_fast_dump_regs() 55 &uccf->uf_regs->utfb, ioread32be(&uccf->uf_regs->utfb)); in ucc_fast_dump_regs() 65 &uccf->uf_regs->urtry, ioread32be(&uccf->uf_regs->urtry)); in ucc_fast_dump_regs() 101 gumr = ioread32be(&uf_regs->gumr); in ucc_fast_enable() 122 gumr = ioread32be(&uf_regs->gumr); in ucc_fast_disable()
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D | gpio.c | 42 qe_gc->cpdata = ioread32be(®s->cpdata); in qe_gpio_save_regs() 44 qe_gc->saved_regs.cpdir1 = ioread32be(®s->cpdir1); in qe_gpio_save_regs() 45 qe_gc->saved_regs.cpdir2 = ioread32be(®s->cpdir2); in qe_gpio_save_regs() 46 qe_gc->saved_regs.cppar1 = ioread32be(®s->cppar1); in qe_gpio_save_regs() 47 qe_gc->saved_regs.cppar2 = ioread32be(®s->cppar2); in qe_gpio_save_regs() 48 qe_gc->saved_regs.cpodr = ioread32be(®s->cpodr); in qe_gpio_save_regs() 57 return !!(ioread32be(®s->cpdata) & pin_mask); in qe_gpio_get()
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/linux-6.12.1/drivers/memory/ |
D | fsl-corenet-cf.c | 109 errdet = ioread32be(&ccf->err_regs->errdet); in ccf_irq() 110 cecar = ioread32be(&ccf->err_regs->cecar); in ccf_irq() 111 cecar2 = ioread32be(&ccf->err_regs->cecar2); in ccf_irq() 112 addr = ioread32be(&ccf->err_regs->cecaddrl); in ccf_irq() 113 addr |= ((u64)(ioread32be(&ccf->err_regs->cecaddrh) & in ccf_irq() 189 u32 brr = ioread32be(ccf->regs + CCF_BRR); in ccf_probe()
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/linux-6.12.1/drivers/rtc/ |
D | rtc-gamecube.c | 109 while (!(ioread32be(iob + EXICSR) & EXICSR_INTSET)) in exi_read() 115 while (!(ioread32be(iob + EXICSR) & EXICSR_INTSET)) in exi_read() 117 *data = ioread32be(iob + EXIDATA); in exi_read() 138 while (!(ioread32be(iob + EXICSR) & EXICSR_INTSET)) in exi_write() 145 while (!(ioread32be(iob + EXICSR) & EXICSR_INTSET)) in exi_write() 245 old = ioread32be(hw_srnprot); in gamecube_rtc_read_offset_from_sram()
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/linux-6.12.1/drivers/usb/host/ |
D | ehci-fsl.c | 114 tmp = ioread32be(hcd->regs + FSL_SOC_USB_CTRL); in fsl_ehci_drv_probe() 130 tmp = ioread32be(hcd->regs + FSL_SOC_USB_CTRL); in fsl_ehci_drv_probe() 185 if (!(ioread32be(non_ehci + FSL_SOC_USB_CTRL) & PHY_CLK_VALID)) in usb_phy_clk_valid() 214 tmp = ioread32be(non_ehci + FSL_SOC_USB_CTRL); in ehci_fsl_setup_phy() 219 tmp = ioread32be(non_ehci + FSL_SOC_USB_CTRL); in ehci_fsl_setup_phy() 255 tmp = ioread32be(non_ehci + FSL_SOC_USB_CTRL); in ehci_fsl_setup_phy() 265 tmp = ioread32be(non_ehci + FSL_SOC_USB_CTRL); in ehci_fsl_setup_phy() 286 tmp = ioread32be(non_ehci + FSL_SOC_USB_CTRL); in ehci_fsl_setup_phy() 592 ehci_fsl->usb_ctrl = ioread32be(non_ehci + FSL_SOC_USB_CTRL); in ehci_fsl_drv_suspend()
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/linux-6.12.1/drivers/net/ethernet/mellanox/mlx5/core/lib/ |
D | tout.c | 84 return !!ioread32be(&dev->iseg->cmd_q_init_to); in tout_is_supported() 94 to = ioread32be(&dev->iseg->cmd_q_init_to); in mlx5_tout_query_iseg() 97 to = ioread32be(&dev->iseg->cmd_exec_to); in mlx5_tout_query_iseg()
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/linux-6.12.1/drivers/net/dsa/b53/ |
D | b53_mmap.c | 68 *val = ioread32be(regs + (page << 8) + reg); in b53_mmap_read32() 89 hi = ioread32be(regs + (page << 8) + reg + 2); in b53_mmap_read48() 101 lo = ioread32be(regs + (page << 8) + reg); in b53_mmap_read48() 124 lo = ioread32be(regs + (page << 8) + reg); in b53_mmap_read64() 125 hi = ioread32be(regs + (page << 8) + reg + 4); in b53_mmap_read64()
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/linux-6.12.1/include/linux/ |
D | io-64-nonatomic-lo-hi.h | 86 low = ioread32be(addr + sizeof(u32)); in ioread64be_lo_hi() 87 high = ioread32be(addr); in ioread64be_lo_hi()
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D | io-64-nonatomic-hi-lo.h | 86 high = ioread32be(addr); in ioread64be_hi_lo() 87 low = ioread32be(addr + sizeof(u32)); in ioread64be_hi_lo()
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/linux-6.12.1/drivers/net/ethernet/freescale/ |
D | fsl_pq_mdio.c | 113 while ((ioread32be(®s->miimind) & MIIMIND_BUSY) && timeout) { in fsl_pq_mdio_write() 147 while ((ioread32be(®s->miimind) & in fsl_pq_mdio_read() 157 value = ioread32be(®s->miimstat); in fsl_pq_mdio_read() 180 while ((ioread32be(®s->miimind) & MIIMIND_BUSY) && timeout) { in fsl_pq_mdio_reset()
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/linux-6.12.1/drivers/soc/fsl/ |
D | rcpm.c | 42 reg_val = ioread32be(regs + SCFG_SPARECR8); in copy_ippdexpcr1_setting() 123 tmp |= ioread32be(address); in rcpm_pm_prepare()
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/linux-6.12.1/arch/sh/kernel/ |
D | iomap.c | 35 unsigned int ioread32be(const void __iomem *addr) in ioread32be() function 39 EXPORT_SYMBOL(ioread32be);
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/linux-6.12.1/drivers/block/ |
D | ps3vram.c | 125 if (!ioread32be(notify + 3)) in ps3vram_notifier_wait() 133 if (!ioread32be(notify + 3)) in ps3vram_notifier_wait() 156 if (ioread32be(priv->ctrl + CTRL_PUT) == ioread32be(priv->ctrl + CTRL_GET)) in ps3vram_wait_ring() 162 ioread32be(priv->ctrl + CTRL_PUT), ioread32be(priv->ctrl + CTRL_GET), in ps3vram_wait_ring() 163 ioread32be(priv->ctrl + CTRL_TOP)); in ps3vram_wait_ring()
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/linux-6.12.1/arch/m68k/include/asm/ |
D | io.h | 11 #define gf_ioread32 ioread32be
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/linux-6.12.1/drivers/net/wan/ |
D | fsl_ucc_hdlc.c | 131 gumr = ioread32be(&priv->uf_regs->gumr); in uhdlc_init() 155 upsmr = ioread32be(&priv->uf_regs->upsmr); in uhdlc_init() 165 gumr = ioread32be(&priv->uf_regs->gumr); in uhdlc_init() 657 ucce = ioread32be(uccf->p_ucce); in ucc_hdlc_irq_handler() 658 uccm = ioread32be(uccf->p_uccm); in ucc_hdlc_irq_handler() 865 priv->cmxsi1cr_h = ioread32be(&qe_mux_reg->cmxsi1cr_h); in store_clk_config() 866 priv->cmxsi1cr_l = ioread32be(&qe_mux_reg->cmxsi1cr_l); in store_clk_config() 869 priv->cmxsi1syr = ioread32be(&qe_mux_reg->cmxsi1syr); in store_clk_config() 904 priv->gumr = ioread32be(&uf_regs->gumr); in uhdlc_suspend()
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