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Searched refs:io_sq (Results 1 – 4 of 4) sorted by relevance

/linux-6.12.1/drivers/net/ethernet/amazon/ena/ !
Dena_eth_com.c35 static void *get_sq_desc_regular_queue(struct ena_com_io_sq *io_sq) in get_sq_desc_regular_queue() argument
40 tail_masked = io_sq->tail & (io_sq->q_depth - 1); in get_sq_desc_regular_queue()
42 offset = tail_masked * io_sq->desc_entry_size; in get_sq_desc_regular_queue()
44 return (void *)((uintptr_t)io_sq->desc_addr.virt_addr + offset); in get_sq_desc_regular_queue()
47 static int ena_com_write_bounce_buffer_to_dev(struct ena_com_io_sq *io_sq, in ena_com_write_bounce_buffer_to_dev() argument
50 struct ena_com_llq_info *llq_info = &io_sq->llq_info; in ena_com_write_bounce_buffer_to_dev()
55 dst_tail_mask = io_sq->tail & (io_sq->q_depth - 1); in ena_com_write_bounce_buffer_to_dev()
58 if (is_llq_max_tx_burst_exists(io_sq)) { in ena_com_write_bounce_buffer_to_dev()
59 if (unlikely(!io_sq->entries_in_tx_burst_left)) { in ena_com_write_bounce_buffer_to_dev()
60 netdev_err(ena_com_io_sq_to_ena_dev(io_sq)->net_device, in ena_com_write_bounce_buffer_to_dev()
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Dena_eth_com.h54 int ena_com_prepare_tx(struct ena_com_io_sq *io_sq,
59 struct ena_com_io_sq *io_sq,
62 int ena_com_add_single_rx_desc(struct ena_com_io_sq *io_sq,
74 static inline int ena_com_free_q_entries(struct ena_com_io_sq *io_sq) in ena_com_free_q_entries() argument
78 next_to_comp = io_sq->next_to_comp; in ena_com_free_q_entries()
79 tail = io_sq->tail; in ena_com_free_q_entries()
82 return io_sq->q_depth - 1 - cnt; in ena_com_free_q_entries()
86 static inline bool ena_com_sq_have_enough_space(struct ena_com_io_sq *io_sq, in ena_com_sq_have_enough_space() argument
91 if (io_sq->mem_queue_type == ENA_ADMIN_PLACEMENT_POLICY_HOST) in ena_com_sq_have_enough_space()
92 return ena_com_free_q_entries(io_sq) >= required_buffers; in ena_com_sq_have_enough_space()
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Dena_com.c312 struct ena_com_io_sq *io_sq) in ena_com_init_io_sq() argument
316 memset(&io_sq->desc_addr, 0x0, sizeof(io_sq->desc_addr)); in ena_com_init_io_sq()
318 io_sq->dma_addr_bits = (u8)ena_dev->dma_addr_bits; in ena_com_init_io_sq()
319 io_sq->desc_entry_size = in ena_com_init_io_sq()
320 (io_sq->direction == ENA_COM_IO_QUEUE_DIRECTION_TX) ? in ena_com_init_io_sq()
324 size = io_sq->desc_entry_size * io_sq->q_depth; in ena_com_init_io_sq()
326 if (io_sq->mem_queue_type == ENA_ADMIN_PLACEMENT_POLICY_HOST) { in ena_com_init_io_sq()
327 io_sq->desc_addr.virt_addr = in ena_com_init_io_sq()
328 dma_alloc_coherent(ena_dev->dmadev, size, &io_sq->desc_addr.phys_addr, in ena_com_init_io_sq()
330 if (!io_sq->desc_addr.virt_addr) { in ena_com_init_io_sq()
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Dena_com.h462 struct ena_com_io_sq **io_sq,
982 static inline struct ena_com_dev *ena_com_io_sq_to_ena_dev(struct ena_com_io_sq *io_sq) in ena_com_io_sq_to_ena_dev() argument
984 return container_of(io_sq, struct ena_com_dev, io_sq_queues[io_sq->qid]); in ena_com_io_sq_to_ena_dev()