Searched refs:interrupt_status_offsets (Results 1 – 4 of 4) sorted by relevance
96 } interrupt_status_offsets[6] = { { variable2998 uint32_t disp_int = RREG32(interrupt_status_offsets[crtc].reg); in dce_v6_0_crtc_irq()3004 if (disp_int & interrupt_status_offsets[crtc].vblank) in dce_v6_0_crtc_irq()3015 if (disp_int & interrupt_status_offsets[crtc].vline) in dce_v6_0_crtc_irq()3119 disp_int = RREG32(interrupt_status_offsets[hpd].reg); in dce_v6_0_hpd_irq()3120 mask = interrupt_status_offsets[hpd].hpd; in dce_v6_0_hpd_irq()
91 } interrupt_status_offsets[6] = { { variable3086 uint32_t disp_int = RREG32(interrupt_status_offsets[crtc].reg); in dce_v8_0_crtc_irq()3092 if (disp_int & interrupt_status_offsets[crtc].vblank) in dce_v8_0_crtc_irq()3103 if (disp_int & interrupt_status_offsets[crtc].vline) in dce_v8_0_crtc_irq()3207 disp_int = RREG32(interrupt_status_offsets[hpd].reg); in dce_v8_0_hpd_irq()3208 mask = interrupt_status_offsets[hpd].hpd; in dce_v8_0_hpd_irq()
92 } interrupt_status_offsets[] = { { variable3252 uint32_t disp_int = RREG32(interrupt_status_offsets[crtc].reg); in dce_v10_0_crtc_irq()3257 if (disp_int & interrupt_status_offsets[crtc].vblank) in dce_v10_0_crtc_irq()3269 if (disp_int & interrupt_status_offsets[crtc].vline) in dce_v10_0_crtc_irq()3298 disp_int = RREG32(interrupt_status_offsets[hpd].reg); in dce_v10_0_hpd_irq()3299 mask = interrupt_status_offsets[hpd].hpd; in dce_v10_0_hpd_irq()
96 } interrupt_status_offsets[] = { { variable3383 uint32_t disp_int = RREG32(interrupt_status_offsets[crtc].reg); in dce_v11_0_crtc_irq()3389 if (disp_int & interrupt_status_offsets[crtc].vblank) in dce_v11_0_crtc_irq()3401 if (disp_int & interrupt_status_offsets[crtc].vline) in dce_v11_0_crtc_irq()3430 disp_int = RREG32(interrupt_status_offsets[hpd].reg); in dce_v11_0_hpd_irq()3431 mask = interrupt_status_offsets[hpd].hpd; in dce_v11_0_hpd_irq()