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Searched refs:intel_uncore_read_fw (Results 1 – 21 of 21) sorted by relevance

/linux-6.12.1/drivers/gpu/drm/i915/gt/
Dintel_gt_pm_debugfs.c96 mt_fwake_req = intel_uncore_read_fw(uncore, FORCEWAKE_MT); in vlv_drpc()
123 mt_fwake_req = intel_uncore_read_fw(uncore, FORCEWAKE_MT); in gen6_drpc()
124 gt_core_status = intel_uncore_read_fw(uncore, GEN6_GT_CORE_STATUS); in gen6_drpc()
270 mt_fwake_req = intel_uncore_read_fw(uncore, FORCEWAKE_MT); in mtl_drpc()
515 rpup = intel_uncore_read_fw(uncore, GEN6_RP_CUR_UP) & GEN6_RP_EI_MASK; in rps_boost_show()
516 rpupei = intel_uncore_read_fw(uncore, GEN6_RP_CUR_UP_EI) & GEN6_RP_EI_MASK; in rps_boost_show()
517 rpdown = intel_uncore_read_fw(uncore, GEN6_RP_CUR_DOWN) & GEN6_RP_EI_MASK; in rps_boost_show()
518 rpdownei = intel_uncore_read_fw(uncore, GEN6_RP_CUR_DOWN_EI) & GEN6_RP_EI_MASK; in rps_boost_show()
Dintel_gt_mcr.c247 mcr = intel_uncore_read_fw(uncore, GEN8_MCR_SELECTOR); in rw_with_mcr_steering_fw()
257 mcr = intel_uncore_read_fw(uncore, GEN8_MCR_SELECTOR); in rw_with_mcr_steering_fw()
266 val = intel_uncore_read_fw(uncore, mcr_reg_cast(reg)); in rw_with_mcr_steering_fw()
356 err = wait_for(intel_uncore_read_fw(gt->uncore, in intel_gt_mcr_lock()
710 return intel_uncore_read_fw(gt->uncore, mcr_reg_cast(reg)); in intel_gt_mcr_read_any_fw()
Dselftest_rc6.c99 intel_uncore_read_fw(gt->uncore, GEN6_RC_STATE), in live_rc6_manual()
100 intel_uncore_read_fw(gt->uncore, GEN6_RC_CONTROL), in live_rc6_manual()
Dintel_rc6.c773 upper = intel_uncore_read_fw(uncore, reg); in vlv_residency_raw()
779 lower = intel_uncore_read_fw(uncore, reg); in vlv_residency_raw()
783 upper = intel_uncore_read_fw(uncore, reg); in vlv_residency_raw()
830 time_hw = intel_uncore_read_fw(uncore, reg); in intel_rc6_residency_ns()
Dselftest_rps.c289 if (wait_for(intel_uncore_read_fw(gt->uncore, in live_rps_clock_interval()
304 cycles_[i] = -intel_uncore_read_fw(gt->uncore, GEN6_RP_CUR_UP_EI); in live_rps_clock_interval()
309 cycles_[i] += intel_uncore_read_fw(gt->uncore, GEN6_RP_CUR_UP_EI); in live_rps_clock_interval()
572 dc = intel_uncore_read_fw(engine->uncore, CS_GPR(0)); in __measure_cs_frequency()
575 dc = intel_uncore_read_fw(engine->uncore, CS_GPR(0)) - dc; in __measure_cs_frequency()
Dintel_reset.c435 if (!(intel_uncore_read_fw(uncore, sfc_lock.usage_reg) & sfc_lock.usage_bit)) { in gen11_lock_sfc()
449 if (!(intel_uncore_read_fw(uncore, in gen11_lock_sfc()
489 lock_obtained = (intel_uncore_read_fw(uncore, sfc_lock.usage_reg) & in gen11_lock_sfc()
573 ack = intel_uncore_read_fw(uncore, reg); in gen8_engine_reset_prepare()
599 intel_uncore_read_fw(uncore, reg)); in gen8_engine_reset_prepare()
Dintel_workarounds.c1001 intel_uncore_read_fw(uncore, wa->reg); in intel_engine_emit_ctx_wa()
1750 intel_uncore_read_fw(uncore, wa->reg); in wa_list_apply()
1762 intel_uncore_read_fw(uncore, wa->reg); in wa_list_apply()
1798 intel_uncore_read_fw(uncore, wa->reg), in wa_list_verify()
Dintel_ggtt.c194 intel_uncore_read_fw(uncore, GFX_FLSH_CNTL_GEN6); in gen6_ggtt_invalidate()
Dintel_rps.c2122 freq = take_fw ? intel_uncore_read(uncore, r) : intel_uncore_read_fw(uncore, r); in __read_cagf()
/linux-6.12.1/drivers/gpu/drm/i915/
Dintel_uncore.h430 #define intel_uncore_read_fw(...) __raw_uncore_read32(__VA_ARGS__) macro
433 #define intel_uncore_posting_read_fw(...) ((void)intel_uncore_read_fw(__VA_ARGS__))
451 old = intel_uncore_read_fw(uncore, reg); in intel_uncore_rmw_fw()
474 upper = intel_uncore_read_fw(uncore, upper_reg); in intel_uncore_read64_2x32()
477 lower = intel_uncore_read_fw(uncore, lower_reg); in intel_uncore_read64_2x32()
478 upper = intel_uncore_read_fw(uncore, upper_reg); in intel_uncore_read64_2x32()
Dintel_pcode.c68 if (intel_uncore_read_fw(uncore, GEN6_PCODE_MAILBOX) & GEN6_PCODE_READY) in __snb_pcode_rw()
85 *val = intel_uncore_read_fw(uncore, GEN6_PCODE_DATA); in __snb_pcode_rw()
87 *val1 = intel_uncore_read_fw(uncore, GEN6_PCODE_DATA1); in __snb_pcode_rw()
Dintel_sbi.c55 *val = intel_uncore_read_fw(uncore, SBI_DATA); in intel_sbi_rw()
Dvlv_sideband.c113 *val = intel_uncore_read_fw(uncore, VLV_IOSF_DATA); in vlv_sideband_rw()
Di915_gpu_error.c1852 gt->forcewake = intel_uncore_read_fw(uncore, FORCEWAKE_VLV); in gt_record_global_regs()
1875 gt->forcewake = intel_uncore_read_fw(uncore, FORCEWAKE); in gt_record_global_regs()
1882 gt->forcewake = intel_uncore_read_fw(uncore, FORCEWAKE_MT); in gt_record_global_regs()
Dintel_uncore.c2728 #define done (((reg_value = intel_uncore_read_fw(uncore, reg)) & mask) == value) in __intel_wait_for_register_fw()
/linux-6.12.1/drivers/gpu/drm/i915/gvt/
Dmmio_context.c194 intel_uncore_read_fw(uncore, offset); in load_render_mocs()
202 intel_uncore_read_fw(uncore, offset); in load_render_mocs()
396 if (wait_for_atomic(intel_uncore_read_fw(uncore, reg) == 0, 50)) in handle_tlb_pending_event()
508 intel_uncore_read_fw(uncore, mmio->reg); in switch_mmio()
515 intel_uncore_read_fw(uncore, mmio->reg); in switch_mmio()
/linux-6.12.1/drivers/gpu/drm/xe/compat-i915-headers/
Dintel_uncore.h126 static inline u32 intel_uncore_read_fw(struct intel_uncore *uncore, in intel_uncore_read_fw() function
/linux-6.12.1/drivers/gpu/drm/i915/display/
Dintel_de.h206 val = intel_uncore_read_fw(__to_uncore(display), reg); in __intel_de_read_fw()
Di9xx_wm.c1792 dsparb = intel_uncore_read_fw(uncore, DSPARB(dev_priv)); in vlv_atomic_update_fifo()
1793 dsparb2 = intel_uncore_read_fw(uncore, DSPARB2); in vlv_atomic_update_fifo()
1809 dsparb = intel_uncore_read_fw(uncore, DSPARB(dev_priv)); in vlv_atomic_update_fifo()
1810 dsparb2 = intel_uncore_read_fw(uncore, DSPARB2); in vlv_atomic_update_fifo()
1826 dsparb3 = intel_uncore_read_fw(uncore, DSPARB3); in vlv_atomic_update_fifo()
1827 dsparb2 = intel_uncore_read_fw(uncore, DSPARB2); in vlv_atomic_update_fifo()
/linux-6.12.1/drivers/gpu/drm/i915/soc/
Dintel_dram.c757 edram_cap = intel_uncore_read_fw(&i915->uncore, HSW_EDRAM_CAP); in intel_dram_edram_detect()
/linux-6.12.1/drivers/gpu/drm/i915/gt/uc/
Dintel_uc_fw.c1123 intel_uncore_read_fw(uncore, DMA_CTRL)); in uc_fw_xfer()