| /linux-6.12.1/drivers/phy/ |
| D | phy-core-mipi-dphy.c | 50 cfg->hs_prepare = 40000 + 4 * ui; in phy_mipi_dphy_calc_config()
150 if (cfg->hs_prepare < (40000 + 4 * ui) || in phy_mipi_dphy_config_validate()
151 cfg->hs_prepare > (85000 + 6 * ui)) in phy_mipi_dphy_config_validate()
154 if ((cfg->hs_prepare + cfg->hs_zero) < (145000 + 10 * ui)) in phy_mipi_dphy_config_validate()
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| /linux-6.12.1/drivers/gpu/drm/msm/dsi/phy/ |
| D | dsi_phy.c | 92 timing->hs_prepare = linear_inter(tmax, tmin, pcnt1, 0, true); in msm_dsi_dphy_timing_calc()
95 temp = ((timing->hs_prepare >> 1) + 1) * 2 * ui + 2 * ui; in msm_dsi_dphy_timing_calc()
139 timing->hs_zero, timing->hs_prepare, timing->hs_trail, in msm_dsi_dphy_timing_calc()
201 timing->hs_prepare = linear_inter(tmax, tmin, pcnt1, 0, false); in msm_dsi_dphy_timing_calc_v2()
203 temp = 145 * coeff + 10 * ui - ((timing->hs_prepare << 3) + val) * ui; in msm_dsi_dphy_timing_calc_v2()
253 timing->hs_zero, timing->hs_prepare, timing->hs_trail, in msm_dsi_dphy_timing_calc_v2()
309 timing->hs_prepare = linear_inter(tmax, tmin, pcnt1, 0, false); in msm_dsi_dphy_timing_calc_v3()
311 temp = 145 * coeff + 10 * ui - (timing->hs_prepare << 3) * ui; in msm_dsi_dphy_timing_calc_v3()
363 timing->hs_zero, timing->hs_prepare, timing->hs_trail, in msm_dsi_dphy_timing_calc_v3()
422 timing->hs_prepare = linear_inter(tmax, tmin, pcnt_hs_prep, 0, false); in msm_dsi_dphy_timing_calc_v4()
[all …]
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| D | dsi_phy.h | 69 u32 hs_prepare; member
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| D | dsi_phy_20nm.c | 28 writel(DSI_20nm_PHY_TIMING_CTRL_6_HS_PREPARE(timing->hs_prepare), in dsi_20nm_dphy_set_timing()
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| D | dsi_phy_28nm_8960.c | 483 writel(DSI_28nm_8960_PHY_TIMING_CTRL_6_HS_PREPARE(timing->hs_prepare), in dsi_28nm_dphy_set_timing()
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| D | dsi_phy_28nm.c | 736 writel(DSI_28nm_PHY_TIMING_CTRL_6_HS_PREPARE(timing->hs_prepare), in dsi_28nm_dphy_set_timing()
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| D | dsi_phy_10nm.c | 843 writel(timing->hs_prepare, base + REG_DSI_10nm_PHY_CMN_TIMING_CTRL_6); in dsi_10nm_phy_enable()
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| D | dsi_phy_14nm.c | 916 u32 prepare = clk_ln ? timing->clk_prepare : timing->hs_prepare; in dsi_14nm_dphy_set_timing()
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| D | dsi_phy_7nm.c | 1051 writel(timing->hs_prepare, base + REG_DSI_7nm_PHY_CMN_TIMING_CTRL_6); in dsi_7nm_phy_enable()
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| /linux-6.12.1/include/linux/phy/ |
| D | phy-mipi-dphy.h | 143 unsigned int hs_prepare; member
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| /linux-6.12.1/drivers/phy/rockchip/ |
| D | phy-rockchip-inno-dsidphy.c | 240 u8 hs_prepare; member
373 u32 hs_prepare, hs_trail, hs_zero, clk_lane_hs_zero, data_lane_hs_zero; in inno_dsidphy_mipi_mode_enable() local
474 hs_prepare = timings[i].hs_prepare; in inno_dsidphy_mipi_mode_enable()
489 T_HS_PREPARE_CNT(hs_prepare)); in inno_dsidphy_mipi_mode_enable()
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| /linux-6.12.1/drivers/phy/freescale/ |
| D | phy-fsl-imx8-mipi-dphy.c | 252 if (2 * dphy_opts->hs_prepare > 5 * lp_t) { in mixel_dphy_config_from_opts()
255 dphy_opts->hs_prepare, lp_t); in mixel_dphy_config_from_opts()
259 if (dphy_opts->hs_prepare < lp_t) { in mixel_dphy_config_from_opts()
262 tmp = 2 * (dphy_opts->hs_prepare - lp_t); in mixel_dphy_config_from_opts()
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| /linux-6.12.1/drivers/phy/amlogic/ |
| D | phy-meson-axg-mipi-dphy.c | 260 (DIV_ROUND_UP(priv->config.hs_prepare, temp) << 24)); in phy_meson_axg_mipi_dphy_power_on()
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| /linux-6.12.1/drivers/gpu/drm/bridge/ |
| D | samsung-dsim.c | 756 int hs_exit, hs_prepare, hs_zero, hs_trail; in samsung_dsim_set_phy_ctrl() local
787 hs_prepare = PS_TO_CYCLE(cfg.hs_prepare, byte_clock); in samsung_dsim_set_phy_ctrl()
838 reg = DSIM_PHYTIMING2_HS_PREPARE(hs_prepare) | in samsung_dsim_set_phy_ctrl()
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| /linux-6.12.1/drivers/gpu/drm/bridge/cadence/ |
| D | cdns-dsi-core.c | 815 reg_wakeup = (phy_cfg->hs_prepare + phy_cfg->hs_zero) / tx_byte_period; in cdns_dsi_bridge_enable()
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| /linux-6.12.1/drivers/media/i2c/ |
| D | tc358746.c | 528 val = tc358746_ps_to_cnt(cfg->hs_prepare, hs_byte_clk) - 1; in tc358746_apply_dphy_config()
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