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Searched refs:high_part (Results 1 – 25 of 34) sorted by relevance

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/linux-6.12.1/drivers/gpu/drm/amd/display/dc/hubp/dcn30/
Ddcn30_hubp.c118 address->grph.meta_addr.high_part); in hubp3_program_surface_flip_and_addr()
127 address->grph.addr.high_part); in hubp3_program_surface_flip_and_addr()
147 address->video_progressive.chroma_meta_addr.high_part); in hubp3_program_surface_flip_and_addr()
155 address->video_progressive.luma_meta_addr.high_part); in hubp3_program_surface_flip_and_addr()
164 address->video_progressive.chroma_addr.high_part); in hubp3_program_surface_flip_and_addr()
172 address->video_progressive.luma_addr.high_part); in hubp3_program_surface_flip_and_addr()
198 address->grph_stereo.right_alpha_meta_addr.high_part); in hubp3_program_surface_flip_and_addr()
206 address->grph_stereo.right_meta_addr.high_part); in hubp3_program_surface_flip_and_addr()
216 address->grph_stereo.left_alpha_meta_addr.high_part); in hubp3_program_surface_flip_and_addr()
224 address->grph_stereo.left_meta_addr.high_part); in hubp3_program_surface_flip_and_addr()
[all …]
/linux-6.12.1/drivers/gpu/drm/amd/display/dmub/src/
Ddmub_dcn30.c103 REG_WRITE(DMCUB_REGION3_CW0_OFFSET_HIGH, offset.u.high_part); in dmub_dcn30_backdoor_load()
112 REG_WRITE(DMCUB_REGION3_CW1_OFFSET_HIGH, offset.u.high_part); in dmub_dcn30_backdoor_load()
138 REG_WRITE(DMCUB_REGION3_CW2_OFFSET_HIGH, offset.u.high_part); in dmub_dcn30_setup_windows()
153 REG_WRITE(DMCUB_REGION3_CW3_OFFSET_HIGH, offset.u.high_part); in dmub_dcn30_setup_windows()
164 REG_WRITE(DMCUB_REGION3_CW4_OFFSET_HIGH, offset.u.high_part); in dmub_dcn30_setup_windows()
171 REG_WRITE(DMCUB_REGION4_OFFSET_HIGH, offset.u.high_part); in dmub_dcn30_setup_windows()
181 REG_WRITE(DMCUB_REGION3_CW5_OFFSET_HIGH, offset.u.high_part); in dmub_dcn30_setup_windows()
188 REG_WRITE(DMCUB_REGION5_OFFSET_HIGH, offset.u.high_part); in dmub_dcn30_setup_windows()
197 REG_WRITE(DMCUB_REGION3_CW6_OFFSET_HIGH, offset.u.high_part); in dmub_dcn30_setup_windows()
Ddmub_dcn20.c170 REG_WRITE(DMCUB_REGION3_CW0_OFFSET_HIGH, offset.u.high_part); in dmub_dcn20_backdoor_load()
179 REG_WRITE(DMCUB_REGION3_CW1_OFFSET_HIGH, offset.u.high_part); in dmub_dcn20_backdoor_load()
207 REG_WRITE(DMCUB_REGION3_CW2_OFFSET_HIGH, offset.u.high_part); in dmub_dcn20_setup_windows()
222 REG_WRITE(DMCUB_REGION3_CW3_OFFSET_HIGH, offset.u.high_part); in dmub_dcn20_setup_windows()
234 REG_WRITE(DMCUB_REGION3_CW4_OFFSET_HIGH, offset.u.high_part); in dmub_dcn20_setup_windows()
241 REG_WRITE(DMCUB_REGION4_OFFSET_HIGH, offset.u.high_part); in dmub_dcn20_setup_windows()
251 REG_WRITE(DMCUB_REGION3_CW5_OFFSET_HIGH, offset.u.high_part); in dmub_dcn20_setup_windows()
258 REG_WRITE(DMCUB_REGION5_OFFSET_HIGH, offset.u.high_part); in dmub_dcn20_setup_windows()
267 REG_WRITE(DMCUB_REGION3_CW6_OFFSET_HIGH, offset.u.high_part); in dmub_dcn20_setup_windows()
Ddmub_dcn35.c184 REG_WRITE(DMCUB_REGION3_CW0_OFFSET_HIGH, offset.u.high_part); in dmub_dcn35_backdoor_load()
193 REG_WRITE(DMCUB_REGION3_CW1_OFFSET_HIGH, offset.u.high_part); in dmub_dcn35_backdoor_load()
212 REG_WRITE(DMCUB_REGION3_CW0_OFFSET_HIGH, offset.u.high_part); in dmub_dcn35_backdoor_load_zfb_mode()
219 REG_WRITE(DMCUB_REGION3_CW1_OFFSET_HIGH, offset.u.high_part); in dmub_dcn35_backdoor_load_zfb_mode()
240 REG_WRITE(DMCUB_REGION3_CW3_OFFSET_HIGH, offset.u.high_part); in dmub_dcn35_setup_windows()
249 REG_WRITE(DMCUB_REGION3_CW4_OFFSET_HIGH, offset.u.high_part); in dmub_dcn35_setup_windows()
258 REG_WRITE(DMCUB_REGION3_CW5_OFFSET_HIGH, offset.u.high_part); in dmub_dcn35_setup_windows()
265 REG_WRITE(DMCUB_REGION5_OFFSET_HIGH, offset.u.high_part); in dmub_dcn35_setup_windows()
274 REG_WRITE(DMCUB_REGION3_CW6_OFFSET_HIGH, offset.u.high_part); in dmub_dcn35_setup_windows()
283 REG_WRITE(DMCUB_REGION6_OFFSET_HIGH, offset.u.high_part); in dmub_dcn35_setup_windows()
Ddmub_dcn401.c139 REG_WRITE(DMCUB_REGION3_CW0_OFFSET_HIGH, offset.u.high_part); in dmub_dcn401_backdoor_load()
148 REG_WRITE(DMCUB_REGION3_CW1_OFFSET_HIGH, offset.u.high_part); in dmub_dcn401_backdoor_load()
169 REG_WRITE(DMCUB_REGION3_CW0_OFFSET_HIGH, offset.u.high_part); in dmub_dcn401_backdoor_load_zfb_mode()
178 REG_WRITE(DMCUB_REGION3_CW1_OFFSET_HIGH, offset.u.high_part); in dmub_dcn401_backdoor_load_zfb_mode()
201 REG_WRITE(DMCUB_REGION3_CW3_OFFSET_HIGH, offset.u.high_part); in dmub_dcn401_setup_windows()
210 REG_WRITE(DMCUB_REGION3_CW4_OFFSET_HIGH, offset.u.high_part); in dmub_dcn401_setup_windows()
219 REG_WRITE(DMCUB_REGION3_CW5_OFFSET_HIGH, offset.u.high_part); in dmub_dcn401_setup_windows()
226 REG_WRITE(DMCUB_REGION5_OFFSET_HIGH, offset.u.high_part); in dmub_dcn401_setup_windows()
235 REG_WRITE(DMCUB_REGION3_CW6_OFFSET_HIGH, offset.u.high_part); in dmub_dcn401_setup_windows()
244 REG_WRITE(DMCUB_REGION6_OFFSET_HIGH, offset.u.high_part); in dmub_dcn401_setup_windows()
Ddmub_dcn32.c165 REG_WRITE(DMCUB_REGION3_CW0_OFFSET_HIGH, offset.u.high_part); in dmub_dcn32_backdoor_load()
174 REG_WRITE(DMCUB_REGION3_CW1_OFFSET_HIGH, offset.u.high_part); in dmub_dcn32_backdoor_load()
195 REG_WRITE(DMCUB_REGION3_CW0_OFFSET_HIGH, offset.u.high_part); in dmub_dcn32_backdoor_load_zfb_mode()
204 REG_WRITE(DMCUB_REGION3_CW1_OFFSET_HIGH, offset.u.high_part); in dmub_dcn32_backdoor_load_zfb_mode()
227 REG_WRITE(DMCUB_REGION3_CW3_OFFSET_HIGH, offset.u.high_part); in dmub_dcn32_setup_windows()
236 REG_WRITE(DMCUB_REGION3_CW4_OFFSET_HIGH, offset.u.high_part); in dmub_dcn32_setup_windows()
245 REG_WRITE(DMCUB_REGION3_CW5_OFFSET_HIGH, offset.u.high_part); in dmub_dcn32_setup_windows()
252 REG_WRITE(DMCUB_REGION5_OFFSET_HIGH, offset.u.high_part); in dmub_dcn32_setup_windows()
261 REG_WRITE(DMCUB_REGION3_CW6_OFFSET_HIGH, offset.u.high_part); in dmub_dcn32_setup_windows()
Ddmub_dcn31.c166 REG_WRITE(DMCUB_REGION3_CW0_OFFSET_HIGH, offset.u.high_part); in dmub_dcn31_backdoor_load()
175 REG_WRITE(DMCUB_REGION3_CW1_OFFSET_HIGH, offset.u.high_part); in dmub_dcn31_backdoor_load()
198 REG_WRITE(DMCUB_REGION3_CW3_OFFSET_HIGH, offset.u.high_part); in dmub_dcn31_setup_windows()
207 REG_WRITE(DMCUB_REGION3_CW4_OFFSET_HIGH, offset.u.high_part); in dmub_dcn31_setup_windows()
216 REG_WRITE(DMCUB_REGION3_CW5_OFFSET_HIGH, offset.u.high_part); in dmub_dcn31_setup_windows()
223 REG_WRITE(DMCUB_REGION5_OFFSET_HIGH, offset.u.high_part); in dmub_dcn31_setup_windows()
232 REG_WRITE(DMCUB_REGION3_CW6_OFFSET_HIGH, offset.u.high_part); in dmub_dcn31_setup_windows()
/linux-6.12.1/drivers/gpu/drm/amd/display/dc/hubp/dcn10/
Ddcn10_hubp.c398 address->grph.meta_addr.high_part); in hubp1_program_surface_flip_and_addr()
407 address->grph.addr.high_part); in hubp1_program_surface_flip_and_addr()
427 address->video_progressive.chroma_meta_addr.high_part); in hubp1_program_surface_flip_and_addr()
435 address->video_progressive.luma_meta_addr.high_part); in hubp1_program_surface_flip_and_addr()
444 address->video_progressive.chroma_addr.high_part); in hubp1_program_surface_flip_and_addr()
452 address->video_progressive.luma_addr.high_part); in hubp1_program_surface_flip_and_addr()
478 address->grph_stereo.right_meta_addr.high_part); in hubp1_program_surface_flip_and_addr()
488 address->grph_stereo.left_meta_addr.high_part); in hubp1_program_surface_flip_and_addr()
497 address->grph_stereo.right_addr.high_part); in hubp1_program_surface_flip_and_addr()
505 address->grph_stereo.left_addr.high_part); in hubp1_program_surface_flip_and_addr()
[all …]
/linux-6.12.1/drivers/gpu/drm/amd/display/dc/hubp/dcn401/
Ddcn401_hubp.c48 REG_UPDATE(HUBP_3DLUT_ADDRESS_HIGH, HUBP_3DLUT_ADDRESS_HIGH, address.lut3d.addr.high_part); in hubp401_program_3dlut_fl_addr()
401 address->grph.addr.high_part); in hubp401_program_surface_flip_and_addr()
418 address->video_progressive.chroma_addr.high_part); in hubp401_program_surface_flip_and_addr()
426 address->video_progressive.luma_addr.high_part); in hubp401_program_surface_flip_and_addr()
446 address->grph_stereo.right_alpha_addr.high_part); in hubp401_program_surface_flip_and_addr()
454 address->grph_stereo.right_addr.high_part); in hubp401_program_surface_flip_and_addr()
462 address->grph_stereo.left_alpha_addr.high_part); in hubp401_program_surface_flip_and_addr()
470 address->grph_stereo.left_addr.high_part); in hubp401_program_surface_flip_and_addr()
487 address->rgbea.alpha_addr.high_part); in hubp401_program_surface_flip_and_addr()
495 address->rgbea.addr.high_part); in hubp401_program_surface_flip_and_addr()
/linux-6.12.1/drivers/gpu/drm/amd/display/dc/hubp/dcn21/
Ddcn21_hubp.c718 address->grph.meta_addr.high_part; in hubp21_program_surface_flip_and_addr()
724 address->grph.addr.high_part; in hubp21_program_surface_flip_and_addr()
735 address->video_progressive.luma_meta_addr.high_part; in hubp21_program_surface_flip_and_addr()
740 address->video_progressive.chroma_meta_addr.high_part; in hubp21_program_surface_flip_and_addr()
746 address->video_progressive.luma_addr.high_part; in hubp21_program_surface_flip_and_addr()
752 address->video_progressive.chroma_addr.high_part; in hubp21_program_surface_flip_and_addr()
767 address->grph_stereo.right_meta_addr.high_part; in hubp21_program_surface_flip_and_addr()
774 address->grph_stereo.left_meta_addr.high_part; in hubp21_program_surface_flip_and_addr()
780 address->grph_stereo.left_addr.high_part; in hubp21_program_surface_flip_and_addr()
785 address->grph_stereo.right_addr.high_part; in hubp21_program_surface_flip_and_addr()
/linux-6.12.1/drivers/gpu/drm/amd/display/dc/hubp/dcn20/
Ddcn20_hubp.c65 DCN_VM_SYSTEM_APERTURE_DEFAULT_ADDR_MSB, mc_vm_apt_default.high_part); in hubp2_set_vm_system_aperture_settings()
603 CURSOR_SURFACE_ADDRESS_HIGH, attr->address.high_part); in hubp2_cursor_set_attributes()
623 hubp->att.SURFACE_ADDR_HIGH = attr->address.high_part; in hubp2_cursor_set_attributes()
664 DMDATA_ADDRESS_HIGH, attr->address.high_part); in hubp2_dmdata_set_attributes()
752 address->grph.meta_addr.high_part); in hubp2_program_surface_flip_and_addr()
761 address->grph.addr.high_part); in hubp2_program_surface_flip_and_addr()
781 address->video_progressive.chroma_meta_addr.high_part); in hubp2_program_surface_flip_and_addr()
789 address->video_progressive.luma_meta_addr.high_part); in hubp2_program_surface_flip_and_addr()
798 address->video_progressive.chroma_addr.high_part); in hubp2_program_surface_flip_and_addr()
806 address->video_progressive.luma_addr.high_part); in hubp2_program_surface_flip_and_addr()
[all …]
/linux-6.12.1/drivers/gpu/drm/amd/display/dc/inc/
Dcompressor.h43 int32_t high_part; member
/linux-6.12.1/drivers/gpu/drm/amd/display/dc/
Ddc_hw_types.h48 int32_t high_part; member
53 int32_t high_part; member
Ddc_dmub_srv.c1821 (uint16_t)address->grph.meta_addr.high_part; in dc_dmub_srv_fams2_passthrough_flip()
1825 (uint16_t)address->grph.addr.high_part; in dc_dmub_srv_fams2_passthrough_flip()
1837 (uint16_t)address->video_progressive.luma_meta_addr.high_part; in dc_dmub_srv_fams2_passthrough_flip()
1841 (uint16_t)address->video_progressive.chroma_meta_addr.high_part; in dc_dmub_srv_fams2_passthrough_flip()
1845 (uint16_t)address->video_progressive.luma_addr.high_part; in dc_dmub_srv_fams2_passthrough_flip()
1849 (uint16_t)address->video_progressive.chroma_addr.high_part; in dc_dmub_srv_fams2_passthrough_flip()
/linux-6.12.1/drivers/gpu/drm/amd/display/dc/hubp/dcn32/
Ddcn32_hubp.c125 CURSOR_SURFACE_ADDRESS_HIGH, attr->address.high_part); in hubp32_cursor_set_attributes()
/linux-6.12.1/drivers/gpu/drm/amd/display/dc/mmhubbub/dcn32/
Ddcn32_mmhubbub.c83 …(MMHUBBUB_WARMUP_BASE_ADDR_HIGH, 0, MMHUBBUB_WARMUP_BASE_ADDR_HIGH, start_address_shift.high_part); in mmhubbub32_warmup_mcif()
/linux-6.12.1/drivers/gpu/drm/amd/display/dc/dcn30/
Ddcn30_mmhubbub.c83 …(MMHUBBUB_WARMUP_BASE_ADDR_HIGH, 0, MMHUBBUB_WARMUP_BASE_ADDR_HIGH, start_address_shift.high_part); in mmhubbub3_warmup_mcif()
/linux-6.12.1/drivers/gpu/drm/amd/display/dc/dce/
Ddce_ipp.c128 CURSOR_SURFACE_ADDRESS_HIGH, attributes->address.high_part); in dce_ipp_cursor_set_attributes()
Ddce_mem_input.c801 address.high_part); in program_sec_addr()
815 address.high_part); in program_pri_addr()
/linux-6.12.1/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn316/
Ddcn316_clk_mgr.c415 clk_mgr_dcn316->smu_wm_set.mc_address.high_part); in dcn316_notify_wm_ranges()
435 smu_dpm_clks->mc_address.high_part); in dcn316_get_dpm_table_from_smu()
/linux-6.12.1/drivers/gpu/drm/amd/display/amdgpu_dm/
Damdgpu_dm_plane.c346 address->grph.meta_addr.high_part = upper_32_bits(dcc_address); in amdgpu_dm_plane_fill_gfx9_plane_attributes_from_modifiers()
867 address->grph.addr.high_part = upper_32_bits(addr); in amdgpu_dm_plane_fill_plane_buffer_attributes()
891 address->video_progressive.luma_addr.high_part = in amdgpu_dm_plane_fill_plane_buffer_attributes()
895 address->video_progressive.chroma_addr.high_part = in amdgpu_dm_plane_fill_plane_buffer_attributes()
1369 attributes.address.high_part = upper_32_bits(address); in amdgpu_dm_plane_handle_cursor_update()
/linux-6.12.1/drivers/gpu/drm/amd/display/dc/dce110/
Ddce110_mem_input_v.c67 temp = address.high_part & in program_pri_addr_c()
103 temp = address.high_part & in program_pri_addr_l()
/linux-6.12.1/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn301/
Dvg_clk_mgr.c459 clk_mgr_vgh->smu_wm_set.mc_address.high_part); in vg_notify_wm_ranges()
655 smu_dpm_clks->mc_address.high_part); in vg_get_dpm_table_from_smu()
/linux-6.12.1/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn31/
Ddcn31_clk_mgr.c493 clk_mgr_dcn31->smu_wm_set.mc_address.high_part); in dcn31_notify_wm_ranges()
513 smu_dpm_clks->mc_address.high_part); in dcn31_get_dpm_table_from_smu()
/linux-6.12.1/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn315/
Ddcn315_clk_mgr.c453 clk_mgr_dcn315->smu_wm_set.mc_address.high_part); in dcn315_notify_wm_ranges()
473 smu_dpm_clks->mc_address.high_part); in dcn315_get_dpm_table_from_smu()

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