Searched refs:h_tile_instance (Results 1 – 3 of 3) sorted by relevance
34 uint32_t h_tile_instance[MAX_H_TILES_PER_DISPLAY]; member
578 info.h_tile_instance[info.num_of_h_tiles++] = i; in _dpu_kms_initialize_dsi()580 info.h_tile_instance[info.num_of_h_tiles++] = other; in _dpu_kms_initialize_dsi()632 info.h_tile_instance[0] = i; in _dpu_kms_initialize_displayport()665 info.h_tile_instance[0] = 0; in _dpu_kms_initialize_hdmi()697 info.h_tile_instance[0] = wb_idx; in _dpu_kms_initialize_writeback()700 maxlinewidth = dpu_rm_get_wb(&dpu_kms->rm, info.h_tile_instance[0])->caps->maxlinewidth; in _dpu_kms_initialize_writeback()
253 msm_dp_needs_periph_flush(priv->dp[disp_info->h_tile_instance[0]], mode); in dpu_encoder_needs_periph_flush()265 index = disp_info->h_tile_instance[0]; in dpu_encoder_is_widebus_enabled()567 int index = dpu_enc->disp_info.h_tile_instance[0]; in dpu_encoder_get_dsc_config()711 if (msm_dp_is_yuv_420_enabled(priv->dp[disp_info->h_tile_instance[0]], adj_mode)) in dpu_encoder_virt_atomic_check()2386 u32 controller_id = disp_info->h_tile_instance[i]; in dpu_encoder_setup_display()