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Searched refs:gt__ (Results 1 – 5 of 5) sorted by relevance

/linux-6.12.1/drivers/gpu/drm/xe/
Dxe_gt_types.h90 #define gt_to_tile(gt__) \ argument
91 _Generic(gt__, \
92 const struct xe_gt * : (const struct xe_tile *)((gt__)->tile), \
93 struct xe_gt * : (gt__)->tile)
95 #define gt_to_xe(gt__) \ argument
96 _Generic(gt__, \
97 const struct xe_gt * : (const struct xe_device *)(gt_to_tile(gt__)->xe), \
98 struct xe_gt * : gt_to_tile(gt__)->xe)
Dxe_wa.h30 #define XE_WA(gt__, id__) ({ \ argument
31 xe_gt_assert(gt__, (gt__)->wa_active.oob_initialized); \
32 test_bit(XE_WA_OOB_ ## id__, (gt__)->wa_active.oob); \
Dxe_gt.h17 #define for_each_hw_engine(hwe__, gt__, id__) \ argument
18 for ((id__) = 0; (id__) < ARRAY_SIZE((gt__)->hw_engines); (id__)++) \
19 for_each_if(((hwe__) = (gt__)->hw_engines + (id__)) && \
Dxe_device.h135 #define for_each_gt(gt__, xe__, id__) \ argument
137 for_each_if((gt__) = xe_device_get_gt((xe__), (id__)))
/linux-6.12.1/drivers/gpu/drm/i915/gt/
Dintel_gt.h80 const struct intel_gt *gt__ __maybe_unused = (gt); \
81 GEM_TRACE("%s " fmt, dev_name(gt__->i915->drm.dev), \
178 #define for_each_gt(gt__, i915__, id__) \ argument
182 for_each_if(((gt__) = (i915__)->gt[(id__)]))
185 #define for_each_engine(engine__, gt__, id__) \ argument
189 for_each_if ((engine__) = (gt__)->engine[(id__)])
192 #define for_each_engine_masked(engine__, gt__, mask__, tmp__) \ argument
193 for ((tmp__) = (mask__) & (gt__)->info.engine_mask; \
195 ((engine__) = (gt__)->engine[__mask_next_bit(tmp__)]), 1 : \