| /linux-6.12.1/drivers/gpu/drm/mediatek/ |
| D | mtk_ddp_comp.h | 99 const struct mtk_ddp_comp_funcs *funcs; member
104 if (comp->funcs && comp->funcs->power_on) in mtk_ddp_comp_power_on()
105 return comp->funcs->power_on(comp->dev); in mtk_ddp_comp_power_on()
113 if (comp->funcs && comp->funcs->power_off) in mtk_ddp_comp_power_off()
114 comp->funcs->power_off(comp->dev); in mtk_ddp_comp_power_off()
121 if (comp->funcs && comp->funcs->clk_enable) in mtk_ddp_comp_clk_enable()
122 return comp->funcs->clk_enable(comp->dev); in mtk_ddp_comp_clk_enable()
129 if (comp->funcs && comp->funcs->clk_disable) in mtk_ddp_comp_clk_disable()
130 comp->funcs->clk_disable(comp->dev); in mtk_ddp_comp_clk_disable()
137 if (comp && comp->funcs && comp->funcs->mode_valid) in mtk_ddp_comp_mode_valid()
[all …]
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| /linux-6.12.1/drivers/gpu/drm/amd/display/dmub/src/ |
| D | dmub_srv.c | 161 struct dmub_srv_hw_funcs *funcs = &dmub->hw_funcs; in dmub_srv_hw_setup() local
172 funcs->reset = dmub_dcn20_reset; in dmub_srv_hw_setup()
173 funcs->reset_release = dmub_dcn20_reset_release; in dmub_srv_hw_setup()
174 funcs->backdoor_load = dmub_dcn20_backdoor_load; in dmub_srv_hw_setup()
175 funcs->setup_windows = dmub_dcn20_setup_windows; in dmub_srv_hw_setup()
176 funcs->setup_mailbox = dmub_dcn20_setup_mailbox; in dmub_srv_hw_setup()
177 funcs->get_inbox1_wptr = dmub_dcn20_get_inbox1_wptr; in dmub_srv_hw_setup()
178 funcs->get_inbox1_rptr = dmub_dcn20_get_inbox1_rptr; in dmub_srv_hw_setup()
179 funcs->set_inbox1_wptr = dmub_dcn20_set_inbox1_wptr; in dmub_srv_hw_setup()
180 funcs->is_supported = dmub_dcn20_is_supported; in dmub_srv_hw_setup()
[all …]
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| /linux-6.12.1/drivers/gpu/drm/ |
| D | drm_simple_kms_helper.c | 92 if (!pipe->funcs || !pipe->funcs->mode_valid) in drm_simple_kms_crtc_mode_valid()
96 return pipe->funcs->mode_valid(pipe, mode); in drm_simple_kms_crtc_mode_valid()
123 if (!pipe->funcs || !pipe->funcs->enable) in drm_simple_kms_crtc_enable()
127 pipe->funcs->enable(pipe, crtc->state, plane->state); in drm_simple_kms_crtc_enable()
136 if (!pipe->funcs || !pipe->funcs->disable) in drm_simple_kms_crtc_disable()
139 pipe->funcs->disable(pipe); in drm_simple_kms_crtc_disable()
154 if (!pipe->funcs || !pipe->funcs->reset_crtc) in drm_simple_kms_crtc_reset()
157 return pipe->funcs->reset_crtc(pipe); in drm_simple_kms_crtc_reset()
165 if (!pipe->funcs || !pipe->funcs->duplicate_crtc_state) in drm_simple_kms_crtc_duplicate_state()
168 return pipe->funcs->duplicate_crtc_state(pipe); in drm_simple_kms_crtc_duplicate_state()
[all …]
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| D | drm_bridge.c | 260 state = bridge->funcs->atomic_duplicate_state(bridge); in drm_bridge_atomic_duplicate_priv_state()
271 bridge->funcs->atomic_destroy_state(bridge, state); in drm_bridge_atomic_destroy_priv_state()
325 if (bridge->funcs->attach) { in drm_bridge_attach()
326 ret = bridge->funcs->attach(bridge, flags); in drm_bridge_attach()
331 if (bridge->funcs->atomic_reset) { in drm_bridge_attach()
334 state = bridge->funcs->atomic_reset(bridge); in drm_bridge_attach()
348 if (bridge->funcs->detach) in drm_bridge_attach()
349 bridge->funcs->detach(bridge); in drm_bridge_attach()
376 if (bridge->funcs->atomic_reset) in drm_bridge_detach()
379 if (bridge->funcs->detach) in drm_bridge_detach()
[all …]
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| D | drm_panel.c | 58 const struct drm_panel_funcs *funcs, int connector_type) in drm_panel_init() argument
64 panel->funcs = funcs; in drm_panel_init()
123 if (panel->funcs && panel->funcs->prepare) { in drm_panel_prepare()
124 ret = panel->funcs->prepare(panel); in drm_panel_prepare()
131 ret = follower->funcs->panel_prepared(follower); in drm_panel_prepare()
134 follower->funcs->panel_prepared, ret); in drm_panel_prepare()
181 ret = follower->funcs->panel_unpreparing(follower); in drm_panel_unprepare()
184 follower->funcs->panel_unpreparing, ret); in drm_panel_unprepare()
187 if (panel->funcs && panel->funcs->unprepare) { in drm_panel_unprepare()
188 ret = panel->funcs->unprepare(panel); in drm_panel_unprepare()
[all …]
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| D | drm_atomic_helper.c | 121 const struct drm_connector_helper_funcs *funcs = connector->helper_private; in handle_conflicting_encoders() local
127 if (funcs->atomic_best_encoder) in handle_conflicting_encoders()
128 new_encoder = funcs->atomic_best_encoder(connector, in handle_conflicting_encoders()
130 else if (funcs->best_encoder) in handle_conflicting_encoders()
131 new_encoder = funcs->best_encoder(connector); in handle_conflicting_encoders()
297 const struct drm_connector_helper_funcs *funcs; in update_connector_routing() local
357 funcs = connector->helper_private; in update_connector_routing()
359 if (funcs->atomic_best_encoder) in update_connector_routing()
360 new_encoder = funcs->atomic_best_encoder(connector, state); in update_connector_routing()
361 else if (funcs->best_encoder) in update_connector_routing()
[all …]
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| D | drm_encoder.c | 80 if (encoder->funcs && encoder->funcs->late_register) in drm_encoder_register_all()
81 ret = encoder->funcs->late_register(encoder); in drm_encoder_register_all()
94 if (encoder->funcs && encoder->funcs->early_unregister) in drm_encoder_unregister_all()
95 encoder->funcs->early_unregister(encoder); in drm_encoder_unregister_all()
103 const struct drm_encoder_funcs *funcs, in __drm_encoder_init() argument
118 encoder->funcs = funcs; in __drm_encoder_init()
165 const struct drm_encoder_funcs *funcs, in drm_encoder_init() argument
171 WARN_ON(!funcs->destroy); in drm_encoder_init()
174 ret = __drm_encoder_init(dev, encoder, funcs, encoder_type, name, ap); in drm_encoder_init()
223 const struct drm_encoder_funcs *funcs, in __drmm_encoder_init() argument
[all …]
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| /linux-6.12.1/drivers/gpu/drm/amd/display/dc/hwss/dcn35/ |
| D | dcn35_hwseq.c | 100 dc->res_pool->mpc->funcs->set_mpc_mem_lp_mode)
101 dc->res_pool->mpc->funcs->set_mpc_mem_lp_mode(dc->res_pool->mpc);
103 …if (dc->debug.enable_mem_low_power.bits.vpg && dc->res_pool->stream_enc[0]->vpg->funcs->vpg_powerd…
106 dc->res_pool->stream_enc[i]->vpg->funcs->vpg_powerdown(dc->res_pool->stream_enc[i]->vpg);
109 …dc->res_pool->hpo_dp_stream_enc[i]->vpg->funcs->vpg_powerdown(dc->res_pool->hpo_dp_stream_enc[i]->…
140 if (dc->clk_mgr && dc->clk_mgr->funcs->init_clocks) in dcn35_init_hw()
141 dc->clk_mgr->funcs->init_clocks(dc->clk_mgr); in dcn35_init_hw()
145 if (!dcb->funcs->is_accelerated_mode(dcb)) { in dcn35_init_hw()
147 hws->funcs.bios_golden_init(dc); in dcn35_init_hw()
151 if (res_pool->dccg->funcs->dccg_init) in dcn35_init_hw()
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| /linux-6.12.1/drivers/gpu/drm/amd/display/dc/link/hwss/ |
| D | link_hwss_dio.c | 44 stream_encoder->funcs->set_throttled_vcp_size( in set_dio_throttled_vcp_size()
54 link_enc->funcs->connect_dig_be_to_fe(link_enc, in setup_dio_stream_encoder()
59 if (stream_enc->funcs->enable_stream) in setup_dio_stream_encoder()
60 stream_enc->funcs->enable_stream(stream_enc, in setup_dio_stream_encoder()
62 if (stream_enc->funcs->map_stream_to_link) in setup_dio_stream_encoder()
63 stream_enc->funcs->map_stream_to_link(stream_enc, in setup_dio_stream_encoder()
65 if (stream_enc->funcs->set_input_mode) in setup_dio_stream_encoder()
66 stream_enc->funcs->set_input_mode(stream_enc, in setup_dio_stream_encoder()
68 if (stream_enc->funcs->enable_fifo) in setup_dio_stream_encoder()
69 stream_enc->funcs->enable_fifo(stream_enc); in setup_dio_stream_encoder()
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| D | link_hwss_hpo_dp.c | 41 hpo_dp_link_encoder->funcs->set_throttled_vcp_size(hpo_dp_link_encoder, in set_hpo_dp_throttled_vcp_size()
70 hpo_dp_stream_encoder->funcs->set_hblank_min_symbol_width(hpo_dp_stream_encoder, in set_hpo_dp_hblank_min_symbol_width()
79 stream_enc->funcs->enable_stream(stream_enc); in setup_hpo_dp_stream_encoder()
80 stream_enc->funcs->map_stream_to_link(stream_enc, stream_enc->inst, link_enc->inst); in setup_hpo_dp_stream_encoder()
87 stream_enc->funcs->disable(stream_enc); in reset_hpo_dp_stream_encoder()
96 stream_enc->funcs->set_stream_attribute( in setup_hpo_dp_stream_attribute()
118 if (link->dc->res_pool->dccg->funcs->set_symclk32_le_root_clock_gating) in enable_hpo_dp_link_output()
119 link->dc->res_pool->dccg->funcs->set_symclk32_le_root_clock_gating( in enable_hpo_dp_link_output()
123 link_res->hpo_dp_link_enc->funcs->enable_link_phy( in enable_hpo_dp_link_output()
139 link_res->hpo_dp_link_enc->funcs->link_disable(link_res->hpo_dp_link_enc); in disable_hpo_dp_link_output()
[all …]
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| /linux-6.12.1/drivers/gpu/drm/amd/display/dc/hwss/dcn31/ |
| D | dcn31_hwseq.c | 92 dc->res_pool->mpc->funcs->set_mpc_mem_lp_mode) in enable_memory_low_power()
93 dc->res_pool->mpc->funcs->set_mpc_mem_lp_mode(dc->res_pool->mpc); in enable_memory_low_power()
96 …if (dc->debug.enable_mem_low_power.bits.vpg && dc->res_pool->stream_enc[0]->vpg->funcs->vpg_powerd… in enable_memory_low_power()
100 dc->res_pool->stream_enc[i]->vpg->funcs->vpg_powerdown(dc->res_pool->stream_enc[i]->vpg); in enable_memory_low_power()
102 …dc->res_pool->hpo_dp_stream_enc[i]->vpg->funcs->vpg_powerdown(dc->res_pool->hpo_dp_stream_enc[i]->… in enable_memory_low_power()
117 if (dc->clk_mgr && dc->clk_mgr->funcs->init_clocks) in dcn31_init_hw()
118 dc->clk_mgr->funcs->init_clocks(dc->clk_mgr); in dcn31_init_hw()
120 if (!dcb->funcs->is_accelerated_mode(dcb)) { in dcn31_init_hw()
121 hws->funcs.bios_golden_init(dc); in dcn31_init_hw()
122 if (hws->funcs.disable_vga) in dcn31_init_hw()
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| /linux-6.12.1/drivers/gpu/drm/amd/amdgpu/ |
| D | amdgpu_vpe.h | 67 const struct vpe_funcs *funcs; member
90 #define vpe_ring_init(vpe) ((vpe)->funcs->ring_init ? (vpe)->funcs->ring_init((vpe)) : 0)
91 #define vpe_ring_start(vpe) ((vpe)->funcs->ring_start ? (vpe)->funcs->ring_start((vpe)) : 0)
92 #define vpe_ring_stop(vpe) ((vpe)->funcs->ring_stop ? (vpe)->funcs->ring_stop((vpe)) : 0)
93 #define vpe_ring_fini(vpe) ((vpe)->funcs->ring_fini ? (vpe)->funcs->ring_fini((vpe)) : 0)
96 ((vpe)->funcs->get_reg_offset ? (vpe)->funcs->get_reg_offset((vpe), (inst), (offset)) : 0)
98 ((vpe)->funcs->set_regs ? (vpe)->funcs->set_regs((vpe)) : 0)
100 ((vpe)->funcs->irq_init ? (vpe)->funcs->irq_init((vpe)) : 0)
102 ((vpe)->funcs->init_microcode ? (vpe)->funcs->init_microcode((vpe)) : 0)
104 ((vpe)->funcs->load_microcode ? (vpe)->funcs->load_microcode((vpe)) : 0)
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| D | amdgpu_psp.h | 324 const struct psp_funcs *funcs; member
413 #define psp_ring_create(psp, type) (psp)->funcs->ring_create((psp), (type))
414 #define psp_ring_stop(psp, type) (psp)->funcs->ring_stop((psp), (type))
415 #define psp_ring_destroy(psp, type) ((psp)->funcs->ring_destroy((psp), (type)))
417 ((psp)->funcs->init_microcode ? (psp)->funcs->init_microcode((psp)) : 0)
419 ((psp)->funcs->bootloader_load_kdb ? (psp)->funcs->bootloader_load_kdb((psp)) : 0)
421 ((psp)->funcs->bootloader_load_spl ? (psp)->funcs->bootloader_load_spl((psp)) : 0)
423 ((psp)->funcs->bootloader_load_sysdrv ? (psp)->funcs->bootloader_load_sysdrv((psp)) : 0)
425 ((psp)->funcs->bootloader_load_soc_drv ? (psp)->funcs->bootloader_load_soc_drv((psp)) : 0)
427 ((psp)->funcs->bootloader_load_intf_drv ? (psp)->funcs->bootloader_load_intf_drv((psp)) : 0)
[all …]
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| D | amdgpu_ib.c | 179 (!ring->funcs->secure_submission_supported)) { in amdgpu_ib_schedule()
184 alloc_size = ring->funcs->emit_frame_size + num_ibs * in amdgpu_ib_schedule()
185 ring->funcs->emit_ib_size; in amdgpu_ib_schedule()
194 if (ring->funcs->emit_pipeline_sync && job && in amdgpu_ib_schedule()
206 if ((ib->flags & AMDGPU_IB_FLAG_EMIT_MEM_SYNC) && ring->funcs->emit_mem_sync) in amdgpu_ib_schedule()
207 ring->funcs->emit_mem_sync(ring); in amdgpu_ib_schedule()
209 if (ring->funcs->emit_wave_limit && in amdgpu_ib_schedule()
211 ring->funcs->emit_wave_limit(ring, true); in amdgpu_ib_schedule()
213 if (ring->funcs->insert_start) in amdgpu_ib_schedule()
214 ring->funcs->insert_start(ring); in amdgpu_ib_schedule()
[all …]
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| D | amdgpu_umsch_mm.h | 139 const struct umsch_mm_funcs *funcs; member
212 ((umsch)->funcs->set_hw_resources ? (umsch)->funcs->set_hw_resources((umsch)) : 0)
214 ((umsch)->funcs->add_queue ? (umsch)->funcs->add_queue((umsch), (input)) : 0)
216 ((umsch)->funcs->remove_queue ? (umsch)->funcs->remove_queue((umsch), (input)) : 0)
219 ((umsch)->funcs->set_regs ? (umsch)->funcs->set_regs((umsch)) : 0)
221 ((umsch)->funcs->init_microcode ? (umsch)->funcs->init_microcode((umsch)) : 0)
223 ((umsch)->funcs->load_microcode ? (umsch)->funcs->load_microcode((umsch)) : 0)
226 ((umsch)->funcs->ring_init ? (umsch)->funcs->ring_init((umsch)) : 0)
228 ((umsch)->funcs->ring_start ? (umsch)->funcs->ring_start((umsch)) : 0)
230 ((umsch)->funcs->ring_stop ? (umsch)->funcs->ring_stop((umsch)) : 0)
[all …]
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| /linux-6.12.1/lib/ |
| D | test_min_heap.c | 36 const struct min_heap_callbacks *funcs) in pop_verify_heap() argument
43 min_heap_pop(heap, funcs, NULL); in pop_verify_heap()
59 min_heap_pop(heap, funcs, NULL); in pop_verify_heap()
73 struct min_heap_callbacks funcs = { in test_heapify_all() local
80 min_heapify_all(&heap, &funcs, NULL); in test_heapify_all()
81 err = pop_verify_heap(min_heap, &heap, &funcs); in test_heapify_all()
89 min_heapify_all(&heap, &funcs, NULL); in test_heapify_all()
90 err += pop_verify_heap(min_heap, &heap, &funcs); in test_heapify_all()
105 struct min_heap_callbacks funcs = { in test_heap_push() local
113 min_heap_push(&heap, &data[i], &funcs, NULL); in test_heap_push()
[all …]
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| /linux-6.12.1/drivers/gpu/drm/amd/display/dc/hwss/dcn401/ |
| D | dcn401_hwseq.c | 68 clocks->dispclk_khz = dc->clk_mgr->funcs->get_dispclk_from_dentist(dc->clk_mgr); in dcn401_initialize_min_clocks()
74 dc->clk_mgr->funcs->update_clocks( in dcn401_initialize_min_clocks()
104 mpc->funcs->set_gamut_remap(mpc, mpcc_id, &mpc_adjust); in dcn401_program_gamut_remap()
110 mpc->funcs->set_gamut_remap(mpc, mpcc_id, &mpc_adjust); in dcn401_program_gamut_remap()
126 mpc->funcs->set_gamut_remap(mpc, mpcc_id, &mpc_adjust); in dcn401_program_gamut_remap()
226 if (dc->clk_mgr && dc->clk_mgr->funcs && dc->clk_mgr->funcs->init_clocks) { in dcn401_init_hw()
227 dc->clk_mgr->funcs->init_clocks(dc->clk_mgr); in dcn401_init_hw()
240 if (res_pool->dccg->funcs->dccg_init) in dcn401_init_hw()
241 res_pool->dccg->funcs->dccg_init(res_pool->dccg); in dcn401_init_hw()
264 (res_pool->dccg->funcs->get_dccg_ref_freq)(res_pool->dccg, in dcn401_init_hw()
[all …]
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| /linux-6.12.1/drivers/gpu/drm/amd/display/dc/hwss/dcn32/ |
| D | dcn32_hwseq.c | 243 } else if (dc->res_pool->funcs->calculate_mall_ways_from_bytes) { in dcn32_calculate_cab_allocation()
244 num_ways = dc->res_pool->funcs->calculate_mall_ways_from_bytes(dc, mall_ss_size_bytes); in dcn32_calculate_cab_allocation()
407 pipe->stream_res.tg->funcs->wait_for_state(pipe->stream_res.tg, CRTC_STATE_VBLANK); in dcn32_subvp_pipe_control_lock()
461 result = mpc->funcs->program_3dlut(mpc, in dcn32_set_mpc_shaper_3dlut()
465 result = mpc->funcs->program_shaper(mpc, in dcn32_set_mpc_shaper_3dlut()
493 mpc->funcs->program_1dlut(mpc, lut_params, mpcc_id); in dcn32_set_mcm_luts()
507 mpc->funcs->program_shaper(mpc, lut_params, mpcc_id); in dcn32_set_mcm_luts()
511 result = mpc->funcs->program_3dlut(mpc, &plane_state->lut3d_func.lut_3d, mpcc_id); in dcn32_set_mcm_luts()
513 result = mpc->funcs->program_3dlut(mpc, NULL, mpcc_id); in dcn32_set_mcm_luts()
538 dpp_base->funcs->dpp_set_pre_degam(dpp_base, tf); in dcn32_set_input_transfer_func()
[all …]
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| /linux-6.12.1/drivers/gpu/drm/amd/display/dc/hwss/dcn10/ |
| D | dcn10_hwseq.c | 118 !tg->funcs->is_tg_enabled(tg) || in dcn10_lock_all_pipes()
151 dc->res_pool->hubbub->funcs->wm_read_state(dc->res_pool->hubbub, &wm); in dcn10_log_hubbub_state()
184 hubp->funcs->hubp_read_state(hubp); in dcn10_log_hubp_states()
304 dpp->funcs->dpp_read_state(dpp, &s); in dcn10_log_color_state()
305 if (dpp->funcs->dpp_get_gamut_remap) { in dcn10_log_color_state()
306 dpp->funcs->dpp_get_gamut_remap(dpp, &s.gamut_remap); in dcn10_log_color_state()
379 pool->mpc->funcs->read_mpcc_state(pool->mpc, i, &s); in dcn10_log_color_state()
427 if (pool->opps[i]->funcs->dpg_is_blanked) in dcn10_log_hw_state()
428 s.blank_enabled = pool->opps[i]->funcs->dpg_is_blanked(pool->opps[i]); in dcn10_log_hw_state()
430 s.blank_enabled = tg->funcs->is_blanked(tg); in dcn10_log_hw_state()
[all …]
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| /linux-6.12.1/drivers/gpu/drm/amd/display/dc/hwss/dcn20/ |
| D | dcn20_hwseq.c | 91 dpp->funcs->dpp_read_state(dpp, &s); in dcn20_log_color_state()
92 dpp->funcs->dpp_get_gamut_remap(dpp, &s.gamut_remap); in dcn20_log_color_state()
161 pool->mpc->funcs->read_mpcc_state(pool->mpc, i, &s); in dcn20_log_color_state()
276 if (pipe_ctx->stream_res.tg->funcs->set_gsl != NULL && in dcn20_setup_gsl_group_as_lock()
277 pipe_ctx->stream_res.tg->funcs->set_gsl_source_select != NULL) { in dcn20_setup_gsl_group_as_lock()
278 pipe_ctx->stream_res.tg->funcs->set_gsl( in dcn20_setup_gsl_group_as_lock()
282 pipe_ctx->stream_res.tg->funcs->set_gsl_source_select( in dcn20_setup_gsl_group_as_lock()
292 if (pipe_ctx && pipe_ctx->plane_res.hubp->funcs->hubp_set_flip_control_surface_gsl) in dcn20_set_flip_control_gsl()
293 pipe_ctx->plane_res.hubp->funcs->hubp_set_flip_control_surface_gsl( in dcn20_set_flip_control_gsl()
388 if (pipe_ctx->plane_res.hubp && pipe_ctx->plane_res.hubp->funcs) { in dcn20_program_triple_buffer()
[all …]
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| /linux-6.12.1/drivers/gpu/drm/amd/display/dc/hwss/dcn201/ |
| D | dcn201_hwseq.c | 149 pipe_ctx->plane_res.hubp->funcs->hubp_program_surface_flip_and_addr( in dcn201_update_plane_addr()
180 tg->funcs->get_otg_active_size(tg, in dcn201_init_blank()
185 tg->funcs->get_optc_source(tg, &num_opps, &opp_id_src0, &opp_id_src1); in dcn201_init_blank()
189 opp->funcs->opp_set_disp_pattern_generator( in dcn201_init_blank()
199 hws->funcs.wait_for_blank_complete(opp); in dcn201_init_blank()
231 if (res_pool->dccg->funcs->dccg_init) in dcn201_init_hw()
232 res_pool->dccg->funcs->dccg_init(res_pool->dccg); in dcn201_init_hw()
234 if (dc->clk_mgr && dc->clk_mgr->funcs->init_clocks) in dcn201_init_hw()
235 dc->clk_mgr->funcs->init_clocks(dc->clk_mgr); in dcn201_init_hw()
237 hws->funcs.bios_golden_init(dc); in dcn201_init_hw()
[all …]
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| /linux-6.12.1/drivers/gpu/drm/amd/display/dc/hwss/dcn30/ |
| D | dcn30_hwseq.c | 90 dpp->funcs->dpp_read_state(dpp, &s); in dcn30_log_color_state()
91 dpp->funcs->dpp_get_gamut_remap(dpp, &s.gamut_remap); in dcn30_log_color_state()
172 pool->mpc->funcs->read_mpcc_state(pool->mpc, i, &s); in dcn30_log_color_state()
238 result = dpp_base->funcs->dpp_program_blnd_lut(dpp_base, blend_lut); in dcn30_set_blend_lut()
279 acquired_rmu = mpc->funcs->acquire_rmu(mpc, mpcc_id, in dcn30_set_mpc_shaper_3dlut()
284 result = mpc->funcs->program_3dlut(mpc, &stream->lut3d_func->lut_3d, in dcn30_set_mpc_shaper_3dlut()
286 result = mpc->funcs->program_shaper(mpc, shaper_lut, in dcn30_set_mpc_shaper_3dlut()
290 mpc->funcs->release_rmu(mpc, mpcc_id); in dcn30_set_mpc_shaper_3dlut()
314 dpp_base->funcs->dpp_set_pre_degam(dpp_base, tf); in dcn30_set_input_transfer_func()
323 result = dpp_base->funcs->dpp_program_gamcor_lut(dpp_base, params); in dcn30_set_input_transfer_func()
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| /linux-6.12.1/drivers/gpu/drm/amd/display/dc/hwss/dce110/ |
| D | dce110_hwseq.c | 228 bp_result = dcb->funcs->enable_disp_power_gating( in dce110_enable_display_power_gating()
296 ipp->funcs->ipp_program_prescale(ipp, &prescale_params); in dce110_set_input_transfer_func()
300 ipp->funcs->ipp_program_input_lut(ipp, &plane_state->gamma_correction); in dce110_set_input_transfer_func()
305 ipp->funcs->ipp_set_degamma(ipp, IPP_DEGAMMA_MODE_HW_sRGB); in dce110_set_input_transfer_func()
308 ipp->funcs->ipp_set_degamma(ipp, IPP_DEGAMMA_MODE_HW_xvYCC); in dce110_set_input_transfer_func()
311 ipp->funcs->ipp_set_degamma(ipp, IPP_DEGAMMA_MODE_BYPASS); in dce110_set_input_transfer_func()
319 ipp->funcs->ipp_set_degamma(ipp, IPP_DEGAMMA_MODE_BYPASS); in dce110_set_input_transfer_func()
610 xfm->funcs->opp_power_on_regamma_lut(xfm, true); in dce110_set_output_transfer_func()
615 xfm->funcs->opp_set_regamma_mode(xfm, OPP_REGAMMA_SRGB); in dce110_set_output_transfer_func()
618 xfm->funcs->opp_program_regamma_pwl(xfm, &xfm->regamma_params); in dce110_set_output_transfer_func()
[all …]
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| /linux-6.12.1/drivers/gpu/drm/amd/display/dc/ |
| D | dc_edid_parser.c | 38 dmcu->funcs->is_dmcu_initialized(dmcu) && in dc_edid_parser_send_cea()
39 dmcu->funcs->send_edid_cea) { in dc_edid_parser_send_cea()
40 return dmcu->funcs->send_edid_cea(dmcu, in dc_edid_parser_send_cea()
55 dmcu->funcs->is_dmcu_initialized(dmcu) && in dc_edid_parser_recv_cea_ack()
56 dmcu->funcs->recv_edid_cea_ack) { in dc_edid_parser_recv_cea_ack()
57 return dmcu->funcs->recv_edid_cea_ack(dmcu, offset); in dc_edid_parser_recv_cea_ack()
71 dmcu->funcs->is_dmcu_initialized(dmcu) && in dc_edid_parser_recv_amd_vsdb()
72 dmcu->funcs->recv_amd_vsdb) { in dc_edid_parser_recv_amd_vsdb()
73 return dmcu->funcs->recv_amd_vsdb(dmcu, in dc_edid_parser_recv_amd_vsdb()
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| /linux-6.12.1/drivers/gpu/drm/amd/display/dc/hwss/dcn351/ |
| D | dcn351_hwseq.c | 110 if (pg_cntl->funcs->dsc_pg_control) in dcn351_hw_block_power_down()
111 pg_cntl->funcs->dsc_pg_control(pg_cntl, i, false); in dcn351_hw_block_power_down()
116 if (pg_cntl->funcs->hubp_dpp_pg_control) in dcn351_hw_block_power_down()
117 pg_cntl->funcs->hubp_dpp_pg_control(pg_cntl, i, false); in dcn351_hw_block_power_down()
124 if (pg_cntl->funcs->plane_otg_pg_control) in dcn351_hw_block_power_down()
125 pg_cntl->funcs->plane_otg_pg_control(pg_cntl, false); in dcn351_hw_block_power_down()
165 if (pg_cntl->funcs->plane_otg_pg_control) in dcn351_hw_block_power_up()
166 pg_cntl->funcs->plane_otg_pg_control(pg_cntl, true); in dcn351_hw_block_power_up()
173 if (pg_cntl->funcs->hubp_dpp_pg_control) in dcn351_hw_block_power_up()
174 pg_cntl->funcs->hubp_dpp_pg_control(pg_cntl, i, true); in dcn351_hw_block_power_up()
[all …]
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