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Searched refs:frac_div (Results 1 – 11 of 11) sorted by relevance

/linux-6.12.1/drivers/clk/tegra/
Dclk-super.c149 struct clk_hw *div_hw = &super->frac_div.hw; in clk_super_determine_rate()
167 struct clk_hw *div_hw = &super->frac_div.hw; in clk_super_recalc_rate()
178 struct clk_hw *div_hw = &super->frac_div.hw; in clk_super_set_rate()
188 struct clk_hw *div_hw = &super->frac_div.hw; in clk_super_restore_context()
267 super->frac_div.reg = reg + 4; in tegra_clk_register_super_clk()
268 super->frac_div.shift = 16; in tegra_clk_register_super_clk()
269 super->frac_div.width = 8; in tegra_clk_register_super_clk()
270 super->frac_div.frac_width = 1; in tegra_clk_register_super_clk()
271 super->frac_div.lock = lock; in tegra_clk_register_super_clk()
Dclk-tegra-super-cclk.c165 super->frac_div.reg = reg + 4; in tegra_clk_register_super_cclk()
166 super->frac_div.shift = 16; in tegra_clk_register_super_cclk()
167 super->frac_div.width = 8; in tegra_clk_register_super_cclk()
168 super->frac_div.frac_width = 1; in tegra_clk_register_super_cclk()
169 super->frac_div.lock = lock; in tegra_clk_register_super_cclk()
Dclk.h742 struct tegra_clk_frac_div frac_div; member
/linux-6.12.1/drivers/clk/x86/
Dclk-cgu-pll.c26 unsigned int div, unsigned int frac, unsigned int frac_div) in lgm_pll_calc_rate() argument
33 do_div(frate, frac_div); in lgm_pll_calc_rate()
/linux-6.12.1/sound/soc/codecs/
Dcx2072x.c586 unsigned int frac_div; in cx2072x_config_pll() local
620 frac_div = pll_output - (int_div * pll_input); in cx2072x_config_pll()
622 if (frac_div) { in cx2072x_config_pll()
623 frac_div *= 1000; in cx2072x_config_pll()
624 frac_div /= pll_input; in cx2072x_config_pll()
625 frac_num = (u64)(4000 + frac_div) * ((1 << 20) - 4); in cx2072x_config_pll()
633 if (frac_div == 0) { in cx2072x_config_pll()
648 if (frac_div == 0) { in cx2072x_config_pll()
Dda732x.c1120 u64 frac_div; in da732x_set_dai_pll() local
1158 frac_div = (u64)(freq_out % fref) * 8192ULL; in da732x_set_dai_pll()
1159 do_div(frac_div, fref); in da732x_set_dai_pll()
1160 div_mid = (frac_div >> DA732X_1BYTE_SHIFT) & DA732X_U8_MASK; in da732x_set_dai_pll()
1161 div_lo = (frac_div) & DA732X_U8_MASK; in da732x_set_dai_pll()
Dda7213.c1606 u64 frac_div; in _da7213_set_component_pll() local
1681 frac_div = (u64)(fout % freq_ref) * 8192ULL; in _da7213_set_component_pll()
1682 do_div(frac_div, freq_ref); in _da7213_set_component_pll()
1683 pll_frac_top = (frac_div >> DA7213_BYTE_SHIFT) & DA7213_BYTE_MASK; in _da7213_set_component_pll()
1684 pll_frac_bot = (frac_div) & DA7213_BYTE_MASK; in _da7213_set_component_pll()
Dda7219.c1224 u64 frac_div; in da7219_set_pll() local
1275 frac_div = (u64)(fout % freq_ref) * 8192ULL; in da7219_set_pll()
1276 do_div(frac_div, freq_ref); in da7219_set_pll()
1277 pll_frac_top = (frac_div >> DA7219_BYTE_SHIFT) & DA7219_BYTE_MASK; in da7219_set_pll()
1278 pll_frac_bot = (frac_div) & DA7219_BYTE_MASK; in da7219_set_pll()
Dsgtl5000.c990 unsigned int in, int_div, frac_div; in sgtl5000_set_clock() local
1007 frac_div = t; in sgtl5000_set_clock()
1009 frac_div << SGTL5000_PLL_FRAC_DIV_SHIFT; in sgtl5000_set_clock()
Dda7218.c1864 u64 frac_div; in da7218_set_dai_pll() local
1915 frac_div = (u64)(fout % freq_ref) * 8192ULL; in da7218_set_dai_pll()
1916 do_div(frac_div, freq_ref); in da7218_set_dai_pll()
1917 pll_frac_top = (frac_div >> DA7218_BYTE_SHIFT) & DA7218_BYTE_MASK; in da7218_set_dai_pll()
1918 pll_frac_bot = (frac_div) & DA7218_BYTE_MASK; in da7218_set_dai_pll()
/linux-6.12.1/drivers/tty/serial/8250/
D8250_pci1xxxx.c266 u32 frac_div; in pci1xxxx_rs485_config() local
268 frac_div = readl(port->membase + FRAC_DIV_CFG_REG); in pci1xxxx_rs485_config()
270 if (frac_div == UART_BIT_DIVISOR_16) in pci1xxxx_rs485_config()