Home
last modified time | relevance | path

Searched refs:fp_control (Results 1 – 4 of 4) sorted by relevance

/linux-6.12.1/drivers/gpu/drm/nouveau/dispnv04/
Ddfp.c108 crtcstate[head].fp_control = FP_TG_CONTROL_OFF; in nv04_dfp_disable()
122 fpc = &nv04_display(dev)->mode_reg.crtc_reg[nv_crtc->index].fp_control; in nv04_dfp_update_fp_control()
137 fpc = &nv04_display(dev)->mode_reg.crtc_reg[nv_crtc->index].fp_control; in nv04_dfp_update_fp_control()
323 regp->fp_control = NV_PRAMDAC_FP_TG_CONTROL_DISPEN_POS | in nv04_dfp_mode_set()
324 (savep->fp_control & (1 << 26 | NV_PRAMDAC_FP_TG_CONTROL_READ_PROG)); in nv04_dfp_mode_set()
328 regp->fp_control |= NV_PRAMDAC_FP_TG_CONTROL_VSYNC_POS; in nv04_dfp_mode_set()
330 regp->fp_control |= NV_PRAMDAC_FP_TG_CONTROL_HSYNC_POS; in nv04_dfp_mode_set()
334 regp->fp_control |= NV_PRAMDAC_FP_TG_CONTROL_MODE_CENTER; in nv04_dfp_mode_set()
337 regp->fp_control |= NV_PRAMDAC_FP_TG_CONTROL_MODE_NATIVE; in nv04_dfp_mode_set()
339 regp->fp_control |= NV_PRAMDAC_FP_TG_CONTROL_MODE_SCALE; in nv04_dfp_mode_set()
[all …]
Dtvnv17.c53 fp_control, test_ctrl, dacclk, ctv_14, ctv_1c, ctv_6c; in nv42_tv_sample_load() local
71 fp_control = NVReadRAMDAC(dev, head, NV_PRAMDAC_FP_TG_CONTROL); in nv42_tv_sample_load()
120 NVWriteRAMDAC(dev, head, NV_PRAMDAC_FP_TG_CONTROL, fp_control); in nv42_tv_sample_load()
555 regs->fp_control = NV_PRAMDAC_FP_TG_CONTROL_DISPEN_POS | in nv17_tv_mode_set()
560 regs->fp_control |= NV_PRAMDAC_FP_TG_CONTROL_VSYNC_POS; in nv17_tv_mode_set()
562 regs->fp_control |= NV_PRAMDAC_FP_TG_CONTROL_HSYNC_POS; in nv17_tv_mode_set()
Ddisp.h59 uint32_t fp_control; member
Dhw.c440 regp->fp_control = NVReadRAMDAC(dev, head, NV_PRAMDAC_FP_TG_CONTROL); in nv_save_state_ramdac()
518 NVWriteRAMDAC(dev, head, NV_PRAMDAC_FP_TG_CONTROL, regp->fp_control); in nv_load_state_ramdac()