Searched refs:fclk_change_latency_us (Results 1 – 13 of 13) sorted by relevance
17 double fclk_change_latency_us = clk_mgr->ctx->dc->dml.soc.fclk_change_latency_us; in dcn401_build_wm_range_table_fpu() local40 …_mgr->bw_params->wm_table.nv_entries[WM_A].dml_input.fclk_change_latency_us = fclk_change_latency_… in dcn401_build_wm_range_table_fpu()52 …_mgr->bw_params->wm_table.nv_entries[WM_B].dml_input.fclk_change_latency_us = fclk_change_latency_… in dcn401_build_wm_range_table_fpu()65 …_mgr->bw_params->wm_table.nv_entries[WM_C].dml_input.fclk_change_latency_us = fclk_change_latency_… in dcn401_build_wm_range_table_fpu()86 …_mgr->bw_params->wm_table.nv_entries[WM_D].dml_input.fclk_change_latency_us = fclk_change_latency_… in dcn401_build_wm_range_table_fpu()136 dc->dml2_options.bbox_overrides.fclk_change_latency_us = in dcn401_update_bw_bounding_box_fpu()
153 .fclk_change_latency_us = 25,190 double fclk_change_latency_us = clk_mgr->base.ctx->dc->dml.soc.fclk_change_latency_us; in dcn32_build_wm_range_table_fpu() local213 …>base.bw_params->wm_table.nv_entries[WM_A].dml_input.fclk_change_latency_us = fclk_change_latency_… in dcn32_build_wm_range_table_fpu()225 …>base.bw_params->wm_table.nv_entries[WM_B].dml_input.fclk_change_latency_us = fclk_change_latency_… in dcn32_build_wm_range_table_fpu()238 …>base.bw_params->wm_table.nv_entries[WM_C].dml_input.fclk_change_latency_us = fclk_change_latency_… in dcn32_build_wm_range_table_fpu()259 …>base.bw_params->wm_table.nv_entries[WM_D].dml_input.fclk_change_latency_us = fclk_change_latency_… in dcn32_build_wm_range_table_fpu()2337 …if (context->bw_ctx.dml.soc.fclk_change_latency_us < dc->clk_mgr->bw_params->dummy_pstate_table[du… in dcn32_calculate_wm_and_dlg_fpu()2339 context->bw_ctx.dml.soc.fclk_change_latency_us = in dcn32_calculate_wm_and_dlg_fpu()2385 …if (context->bw_ctx.dml.soc.fclk_change_latency_us < dc->clk_mgr->bw_params->dummy_pstate_table[du… in dcn32_calculate_wm_and_dlg_fpu()2387 context->bw_ctx.dml.soc.fclk_change_latency_us = in dcn32_calculate_wm_and_dlg_fpu()[all …]
381 p->in_states->state_array[0].fclk_change_latency_us = 20; in dml2_init_soc_states()417 p->in_states->state_array[0].fclk_change_latency_us = 7; in dml2_init_soc_states()452 p->in_states->state_array[0].fclk_change_latency_us = 0; //20; in dml2_init_soc_states()494 if (dml2->config.bbox_overrides.fclk_change_latency_us) { in dml2_init_soc_states()495 p->in_states->state_array[i].fclk_change_latency_us = in dml2_init_soc_states()496 dml2->config.bbox_overrides.fclk_change_latency_us; in dml2_init_soc_states()688 out->state_array[i].fclk_change_latency_us = dc->dml.soc.fclk_change_latency_us; in dml2_translate_soc_states()
192 double fclk_change_latency_us; member
645 dml_print("DML: state_bbox: fclk_change_latency_us = %f\n", state->fclk_change_latency_us); in dml_print_soc_state_bounding_box()
289 dml_float_t fclk_change_latency_us; member
6357 mode_lib->ms.state.fclk_change_latency_us, in dml_prefetch_check()6637 s->mSOCParameters.FCLKChangeLatency = mode_lib->ms.state.fclk_change_latency_us; in dml_prefetch_check()7958 UseMinimumDCFCLK_params->FCLKChangeLatency = mode_lib->ms.state.fclk_change_latency_us; in dml_core_mode_support()8955 mode_lib->ms.state.fclk_change_latency_us, in dml_core_mode_programming()9399 s->mmSOCParameters.FCLKChangeLatency = mode_lib->ms.state.fclk_change_latency_us; in dml_core_mode_programming()
132 .fclk_change_latency_us = 7,646 if ((int)(dcn3_21_soc.fclk_change_latency_us * 1000) in dcn321_update_bw_bounding_box_fpu()649 dc->dml2_options.bbox_overrides.fclk_change_latency_us = in dcn321_update_bw_bounding_box_fpu()650 dcn3_21_soc.fclk_change_latency_us = in dcn321_update_bw_bounding_box_fpu()
161 double fclk_change_latency_us; member
198 double fclk_change_latency_us; member
343 mode_lib->vba.FCLKChangeLatency = soc->fclk_change_latency_us; in fetch_socbb_params()
171 .fclk_change_latency_us = 24.0,
209 .fclk_change_latency_us = 24.0,