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Searched refs:ecc_err_cnt_sel (Results 1 – 4 of 4) sorted by relevance

/linux-6.12.1/drivers/gpu/drm/amd/amdgpu/
Dumc_v6_1.c98 uint32_t ecc_err_cnt_sel, ecc_err_cnt_sel_addr; in umc_v6_1_clear_error_count_per_channel() local
119 ecc_err_cnt_sel = RREG32_PCIE((ecc_err_cnt_sel_addr + in umc_v6_1_clear_error_count_per_channel()
121 ecc_err_cnt_sel = REG_SET_FIELD(ecc_err_cnt_sel, in umc_v6_1_clear_error_count_per_channel()
125 ecc_err_cnt_sel); in umc_v6_1_clear_error_count_per_channel()
132 ecc_err_cnt_sel = RREG32_PCIE((ecc_err_cnt_sel_addr + in umc_v6_1_clear_error_count_per_channel()
134 ecc_err_cnt_sel = REG_SET_FIELD(ecc_err_cnt_sel, in umc_v6_1_clear_error_count_per_channel()
138 ecc_err_cnt_sel); in umc_v6_1_clear_error_count_per_channel()
173 uint32_t ecc_err_cnt_sel, ecc_err_cnt_sel_addr; in umc_v6_1_query_correctable_error_count() local
197 ecc_err_cnt_sel = RREG32_PCIE((ecc_err_cnt_sel_addr + umc_reg_offset) * 4); in umc_v6_1_query_correctable_error_count()
198 ecc_err_cnt_sel = REG_SET_FIELD(ecc_err_cnt_sel, UMCCH0_0_EccErrCntSel, in umc_v6_1_query_correctable_error_count()
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Dumc_v8_7.c184 uint32_t ecc_err_cnt_sel, ecc_err_cnt_sel_addr; in umc_v8_7_clear_error_count_per_channel() local
192 ecc_err_cnt_sel = RREG32_PCIE((ecc_err_cnt_sel_addr + in umc_v8_7_clear_error_count_per_channel()
194 ecc_err_cnt_sel = REG_SET_FIELD(ecc_err_cnt_sel, in umc_v8_7_clear_error_count_per_channel()
198 ecc_err_cnt_sel); in umc_v8_7_clear_error_count_per_channel()
205 ecc_err_cnt_sel = RREG32_PCIE((ecc_err_cnt_sel_addr + in umc_v8_7_clear_error_count_per_channel()
207 ecc_err_cnt_sel = REG_SET_FIELD(ecc_err_cnt_sel, in umc_v8_7_clear_error_count_per_channel()
211 ecc_err_cnt_sel); in umc_v8_7_clear_error_count_per_channel()
238 uint32_t ecc_err_cnt_sel, ecc_err_cnt_sel_addr; in umc_v8_7_query_correctable_error_count() local
252 ecc_err_cnt_sel = RREG32_PCIE((ecc_err_cnt_sel_addr + umc_reg_offset) * 4); in umc_v8_7_query_correctable_error_count()
253 ecc_err_cnt_sel = REG_SET_FIELD(ecc_err_cnt_sel, UMCCH0_0_GeccErrCntSel, in umc_v8_7_query_correctable_error_count()
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Dumc_v6_7.c267 uint32_t ecc_err_cnt_sel, ecc_err_cnt_sel_addr; in umc_v6_7_query_correctable_error_count() local
281 ecc_err_cnt_sel = RREG32_PCIE((ecc_err_cnt_sel_addr + umc_reg_offset) * 4); in umc_v6_7_query_correctable_error_count()
282 ecc_err_cnt_sel = REG_SET_FIELD(ecc_err_cnt_sel, UMCCH0_0_EccErrCntSel, in umc_v6_7_query_correctable_error_count()
284 WREG32_PCIE((ecc_err_cnt_sel_addr + umc_reg_offset) * 4, ecc_err_cnt_sel); in umc_v6_7_query_correctable_error_count()
292 ecc_err_cnt_sel = REG_SET_FIELD(ecc_err_cnt_sel, UMCCH0_0_EccErrCntSel, in umc_v6_7_query_correctable_error_count()
294 WREG32_PCIE((ecc_err_cnt_sel_addr + umc_reg_offset) * 4, ecc_err_cnt_sel); in umc_v6_7_query_correctable_error_count()
366 uint32_t ecc_err_cnt_sel, ecc_err_cnt_sel_addr; in umc_v6_7_reset_error_count_per_channel() local
378 ecc_err_cnt_sel = RREG32_PCIE((ecc_err_cnt_sel_addr + in umc_v6_7_reset_error_count_per_channel()
380 ecc_err_cnt_sel = REG_SET_FIELD(ecc_err_cnt_sel, in umc_v6_7_reset_error_count_per_channel()
384 ecc_err_cnt_sel); in umc_v6_7_reset_error_count_per_channel()
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Dumc_v8_10.c298 uint32_t ecc_err_cnt_sel, ecc_err_cnt_sel_addr; in umc_v8_10_err_cnt_init_per_channel() local
308 ecc_err_cnt_sel = RREG32_PCIE((ecc_err_cnt_sel_addr + umc_reg_offset) * 4); in umc_v8_10_err_cnt_init_per_channel()
311 ecc_err_cnt_sel = REG_SET_FIELD(ecc_err_cnt_sel, UMCCH0_0_GeccErrCntSel, in umc_v8_10_err_cnt_init_per_channel()
313 WREG32_PCIE((ecc_err_cnt_sel_addr + umc_reg_offset) * 4, ecc_err_cnt_sel); in umc_v8_10_err_cnt_init_per_channel()