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Searched refs:dramclk_khz (Results 1 – 19 of 19) sorted by relevance

/linux-6.12.1/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn30/
Ddcn30_clk_mgr.c253 if ((new_clocks->dramclk_khz <= dc->clk_mgr->bw_params->dc_mode_softmax_memclk * 1000) != in dcn3_update_clocks()
254 (clk_mgr_base->clks.dramclk_khz <= dc->clk_mgr->bw_params->dc_mode_softmax_memclk * 1000)) in dcn3_update_clocks()
265 new_clocks->dramclk_khz <= dc->clk_mgr->bw_params->dc_mode_softmax_memclk * 1000) in dcn3_update_clocks()
275 if (should_set_clock(safe_to_lower, new_clocks->dramclk_khz, clk_mgr_base->clks.dramclk_khz)) { in dcn3_update_clocks()
276 clk_mgr_base->clks.dramclk_khz = new_clocks->dramclk_khz; in dcn3_update_clocks()
283 …n30_smu_set_hard_min_by_freq(clk_mgr, PPCLK_UCLK, khz_to_mhz_ceil(clk_mgr_base->clks.dramclk_khz)); in dcn3_update_clocks()
365 khz_to_mhz_ceil(clk_mgr_base->clks.dramclk_khz)); in dcn3_set_hard_min_memclk()
446 else if (a->dramclk_khz != b->dramclk_khz) in dcn3_are_clock_states_equal()
/linux-6.12.1/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn20/
Ddcn20_clk_mgr.c290 if (should_set_clock(safe_to_lower, new_clocks->dramclk_khz, clk_mgr_base->clks.dramclk_khz)) { in dcn2_update_clocks()
291 clk_mgr_base->clks.dramclk_khz = new_clocks->dramclk_khz; in dcn2_update_clocks()
293 …p_smu->set_hard_min_uclk_by_freq(&pp_smu->pp_smu, khz_to_mhz_ceil(clk_mgr_base->clks.dramclk_khz)); in dcn2_update_clocks()
370 if (should_set_clock(safe_to_lower, new_clocks->dramclk_khz, clk_mgr->clks.dramclk_khz)) { in dcn2_update_clocks_fpga()
371 clk_mgr->clks.dramclk_khz = new_clocks->dramclk_khz; in dcn2_update_clocks_fpga()
484 else if (a->dramclk_khz != b->dramclk_khz) in dcn2_are_clock_states_equal()
/linux-6.12.1/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn201/
Ddcn201_clk_mgr.c140 if (should_set_clock(safe_to_lower, new_clocks->dramclk_khz, clk_mgr_base->clks.dramclk_khz)) in dcn201_update_clocks()
141 clk_mgr_base->clks.dramclk_khz = new_clocks->dramclk_khz; in dcn201_update_clocks()
/linux-6.12.1/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn401/
Ddcn401_clk_mgr.c414 dramclk_khz_override = new_clocks->dramclk_khz; in dcn401_auto_dpm_test_log()
435 new_clocks->dramclk_khz > 0 && in dcn401_auto_dpm_test_log()
731 if (should_set_clock(safe_to_lower, new_clocks->dramclk_khz, clk_mgr_base->clks.dramclk_khz)) { in dcn401_update_clocks_legacy()
732 clk_mgr_base->clks.dramclk_khz = new_clocks->dramclk_khz; in dcn401_update_clocks_legacy()
740 …401_smu_set_hard_min_by_freq(clk_mgr, PPCLK_UCLK, khz_to_mhz_ceil(clk_mgr_base->clks.dramclk_khz)); in dcn401_update_clocks_legacy()
953 int active_uclk_mhz = khz_to_mhz_ceil(clk_mgr_base->clks.dramclk_khz); in dcn401_build_update_bandwidth_clocks_sequence()
1094 if (should_set_clock(safe_to_lower, new_clocks->dramclk_khz, clk_mgr_base->clks.dramclk_khz)) { in dcn401_build_update_bandwidth_clocks_sequence()
1095 clk_mgr_base->clks.dramclk_khz = new_clocks->dramclk_khz; in dcn401_build_update_bandwidth_clocks_sequence()
1099 active_uclk_mhz = khz_to_mhz_ceil(clk_mgr_base->clks.dramclk_khz); in dcn401_build_update_bandwidth_clocks_sequence()
1490 new_clocks.dramclk_khz = context->bw_ctx.bw.dcn.clk.dramclk_khz; in dcn401_set_hard_min_memclk()
[all …]
/linux-6.12.1/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn32/
Ddcn32_clk_mgr.c538 dramclk_khz_override = new_clocks->dramclk_khz; in dcn32_auto_dpm_test_log()
559 new_clocks->dramclk_khz > 0 && in dcn32_auto_dpm_test_log()
746 if (should_set_clock(safe_to_lower, new_clocks->dramclk_khz, clk_mgr_base->clks.dramclk_khz) && in dcn32_update_clocks()
748 clk_mgr_base->clks.dramclk_khz = new_clocks->dramclk_khz; in dcn32_update_clocks()
758 …)dc->clk_mgr->bw_params->dc_mode_softmax_memclk, khz_to_mhz_ceil(clk_mgr_base->clks.dramclk_khz))); in dcn32_update_clocks()
760 …n32_smu_set_hard_min_by_freq(clk_mgr, PPCLK_UCLK, khz_to_mhz_ceil(clk_mgr_base->clks.dramclk_khz)); in dcn32_update_clocks()
1004 khz_to_mhz_ceil(clk_mgr_base->clks.dramclk_khz)); in dcn32_set_hard_min_memclk()
1083 else if (a->dramclk_khz != b->dramclk_khz) in dcn32_are_clock_states_equal()
/linux-6.12.1/drivers/gpu/drm/amd/display/amdgpu_dm/
Damdgpu_dm_trace.h502 __field(int, dramclk_khz)
520 __entry->dramclk_khz = clk->dramclk_khz;
545 __entry->dramclk_khz,
Damdgpu_dm_helpers.c1229 dc_state->bw_ctx.bw.dcn.clk.dramclk_khz = clk_mgr->dc_mode_softmax_enabled ? in dm_helpers_dp_handle_test_pattern_request()
1231 dc_state->bw_ctx.bw.dcn.clk.idle_dramclk_khz = dc_state->bw_ctx.bw.dcn.clk.dramclk_khz; in dm_helpers_dp_handle_test_pattern_request()
/linux-6.12.1/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn35/
Ddcn35_clk_mgr.c1025 if (should_set_clock(safe_to_lower, new_clocks->dramclk_khz, clk_mgr->clks.dramclk_khz)) { in dcn35_update_clocks_fpga()
1026 clk_mgr->clks.dramclk_khz = new_clocks->dramclk_khz; in dcn35_update_clocks_fpga()
/linux-6.12.1/drivers/gpu/drm/amd/display/dc/hwss/dcn401/
Ddcn401_hwseq.c58 clocks->dramclk_khz = dc->clk_mgr->bw_params->clk_table.entries[0].memclk_mhz * 1000; in dcn401_initialize_min_clocks()
1411 if (dc->clk_mgr->clks.dramclk_khz <= dc->clk_mgr->bw_params->dc_mode_softmax_memclk * 1000 && in dcn401_prepare_bandwidth()
1412 context->bw_ctx.bw.dcn.clk.dramclk_khz > dc->clk_mgr->bw_params->dc_mode_softmax_memclk * 1000) in dcn401_prepare_bandwidth()
1472 if (dc->clk_mgr->clks.dramclk_khz > dc->clk_mgr->bw_params->dc_mode_softmax_memclk * 1000 && in dcn401_optimize_bandwidth()
1473 context->bw_ctx.bw.dcn.clk.dramclk_khz <= dc->clk_mgr->bw_params->dc_mode_softmax_memclk * 1000) in dcn401_optimize_bandwidth()
/linux-6.12.1/drivers/gpu/drm/amd/display/dc/hwss/dcn32/
Ddcn32_hwseq.c751 clocks->dramclk_khz = dc->clk_mgr->bw_params->clk_table.entries[0].memclk_mhz * 1000; in dcn32_initialize_min_clocks()
1835 if (dc->clk_mgr->clks.dramclk_khz <= dc->clk_mgr->bw_params->dc_mode_softmax_memclk * 1000 && in dcn32_prepare_bandwidth()
1836 context->bw_ctx.bw.dcn.clk.dramclk_khz > dc->clk_mgr->bw_params->dc_mode_softmax_memclk * 1000) in dcn32_prepare_bandwidth()
/linux-6.12.1/drivers/gpu/drm/amd/display/dc/hwss/dcn30/
Ddcn30_hwseq.c1179 if (dc->clk_mgr->clks.dramclk_khz <= dc->clk_mgr->bw_params->dc_mode_softmax_memclk * 1000 && in dcn30_prepare_bandwidth()
1180 context->bw_ctx.bw.dcn.clk.dramclk_khz > dc->clk_mgr->bw_params->dc_mode_softmax_memclk * 1000) in dcn30_prepare_bandwidth()
/linux-6.12.1/drivers/gpu/drm/amd/display/dc/dml/dcn31/
Ddcn31_fpu.c569 context->bw_ctx.bw.dcn.clk.dramclk_khz = 0; in dcn31_calculate_wm_and_dlg_fp()
/linux-6.12.1/drivers/gpu/drm/amd/display/dc/dml2/
Ddml2_utils.c186 context->bw_ctx.bw.dcn.clk.dramclk_khz = out_clks->uclk_mts / 16; in dml2_copy_clocks_to_dc_state()
/linux-6.12.1/drivers/gpu/drm/amd/display/dc/dml/dcn20/
Ddcn20_fpu.c1157 context->bw_ctx.bw.dcn.clk.dramclk_khz = context->bw_ctx.dml.vba.DRAMSpeed * 1000 / 16; in dcn20_calculate_dlg_params()
1159 if (dc->debug.min_dram_clk_khz > context->bw_ctx.bw.dcn.clk.dramclk_khz) in dcn20_calculate_dlg_params()
1160 context->bw_ctx.bw.dcn.clk.dramclk_khz = dc->debug.min_dram_clk_khz; in dcn20_calculate_dlg_params()
/linux-6.12.1/drivers/gpu/drm/amd/display/dc/
Ddc.h588 int dramclk_khz; member
/linux-6.12.1/drivers/gpu/drm/amd/display/dc/dml/dcn32/
Ddcn32_fpu.c1658 context->bw_ctx.bw.dcn.clk.dramclk_khz = context->bw_ctx.dml.vba.DRAMSpeed * 1000 / 16; in dcn32_calculate_dlg_params()
1768 context->bw_ctx.bw.dcn.clk.dramclk_khz = 0; in dcn32_calculate_dlg_params()
3604 context->bw_ctx.bw.dcn.clk.dramclk_khz = context->bw_ctx.dml.vba.DRAMSpeed * 1000 / 16; in dcn32_override_min_req_memclk()
/linux-6.12.1/drivers/gpu/drm/amd/display/dc/dml2/dml21/
Ddml21_translation_helper.c1030 …context->bw_ctx.bw.dcn.clk.dramclk_khz = in_ctx->v21.mode_programming.programming->min_clocks.dcn4… in dml21_copy_clocks_to_dc_state()
/linux-6.12.1/drivers/gpu/drm/amd/display/dc/hwss/dcn20/
Ddcn20_hwseq.c2410 if (dc->clk_mgr->clks.dramclk_khz > dc->clk_mgr->bw_params->dc_mode_softmax_memclk * 1000 && in dcn20_optimize_bandwidth()
2411 context->bw_ctx.bw.dcn.clk.dramclk_khz <= dc->clk_mgr->bw_params->dc_mode_softmax_memclk * 1000) in dcn20_optimize_bandwidth()
/linux-6.12.1/drivers/gpu/drm/amd/display/dc/core/
Ddc.c5247 info->memoryClock = (unsigned int)state->bw_ctx.bw.dcn.clk.dramclk_khz; in get_clock_requirements_for_state()
5475 funcMin = (dc->clk_mgr->clks.dramclk_khz + 999) / 1000; in dc_enable_dcmode_clk_limit()