/linux-6.12.1/drivers/gpu/drm/msm/disp/dpu1/ |
D | dpu_hw_util.h | 35 struct dpu_hw_blk_reg_map { struct 333 void dpu_reg_write(struct dpu_hw_blk_reg_map *c, 337 int dpu_reg_read(struct dpu_hw_blk_reg_map *c, u32 reg_off); 344 void dpu_hw_setup_scaler3(struct dpu_hw_blk_reg_map *c, 349 void dpu_hw_csc_setup(struct dpu_hw_blk_reg_map *c, 353 void dpu_setup_cdp(struct dpu_hw_blk_reg_map *c, u32 offset, 359 void _dpu_hw_setup_qos_lut(struct dpu_hw_blk_reg_map *c, u32 offset, 363 void dpu_hw_setup_misr(struct dpu_hw_blk_reg_map *c, 366 int dpu_hw_collect_misr(struct dpu_hw_blk_reg_map *c, 371 bool dpu_hw_clk_force_ctrl(struct dpu_hw_blk_reg_map *c,
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D | dpu_hw_vbif.c | 40 struct dpu_hw_blk_reg_map *c; in dpu_hw_clear_errors() 60 struct dpu_hw_blk_reg_map *c; in dpu_hw_set_mem_type() 90 struct dpu_hw_blk_reg_map *c = &vbif->hw; in dpu_hw_set_limit_conf() 111 struct dpu_hw_blk_reg_map *c = &vbif->hw; in dpu_hw_get_limit_conf() 133 struct dpu_hw_blk_reg_map *c = &vbif->hw; in dpu_hw_set_halt_ctrl() 149 struct dpu_hw_blk_reg_map *c = &vbif->hw; in dpu_hw_get_halt_ctrl() 160 struct dpu_hw_blk_reg_map *c; in dpu_hw_set_qos_remap() 189 struct dpu_hw_blk_reg_map *c; in dpu_hw_set_write_gather_en()
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D | dpu_hw_pingpong.c | 50 struct dpu_hw_blk_reg_map *c; in dpu_hw_pp_setup_dither() 81 struct dpu_hw_blk_reg_map *c; in dpu_hw_pp_enable_te() 135 struct dpu_hw_blk_reg_map *c; in dpu_hw_pp_disable_te() 148 struct dpu_hw_blk_reg_map *c = &pp->hw; in dpu_hw_pp_connect_external_te() 171 struct dpu_hw_blk_reg_map *c; in dpu_hw_pp_get_vsync_info() 193 struct dpu_hw_blk_reg_map *c = &pp->hw; in dpu_hw_pp_get_line_count() 262 struct dpu_hw_blk_reg_map *c = &pp->hw; in dpu_hw_pp_dsc_enable() 270 struct dpu_hw_blk_reg_map *c = &pp->hw; in dpu_hw_pp_dsc_disable() 277 struct dpu_hw_blk_reg_map *pp_c = &pp->hw; in dpu_hw_pp_setup_dsc()
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D | dpu_hw_intf.c | 104 struct dpu_hw_blk_reg_map *c = &intf->hw; in dpu_hw_intf_setup_timing_engine() 260 struct dpu_hw_blk_reg_map *c = &intf->hw; in dpu_hw_intf_enable_timing_engine() 269 struct dpu_hw_blk_reg_map *c = &intf->hw; in dpu_hw_intf_setup_prg_fetch() 293 struct dpu_hw_blk_reg_map *c = &intf->hw; in dpu_hw_intf_bind_pingpong_blk() 311 struct dpu_hw_blk_reg_map *c = &intf->hw; in dpu_hw_intf_get_status() 331 struct dpu_hw_blk_reg_map *c; in dpu_hw_intf_get_line_count() 354 struct dpu_hw_blk_reg_map *c; in dpu_hw_intf_enable_te() 387 struct dpu_hw_blk_reg_map *c; in dpu_hw_intf_setup_autorefresh_config() 419 struct dpu_hw_blk_reg_map *c; in dpu_hw_intf_disable_te() 432 struct dpu_hw_blk_reg_map *c = &intf->hw; in dpu_hw_intf_connect_external_te() [all …]
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D | dpu_hw_util.c | 90 void dpu_reg_write(struct dpu_hw_blk_reg_map *c, in dpu_reg_write() 102 int dpu_reg_read(struct dpu_hw_blk_reg_map *c, u32 reg_off) in dpu_reg_read() 112 static void _dpu_hw_setup_scaler3_lut(struct dpu_hw_blk_reg_map *c, in _dpu_hw_setup_scaler3_lut() 187 static void _dpu_hw_setup_scaler3lite_lut(struct dpu_hw_blk_reg_map *c, in _dpu_hw_setup_scaler3lite_lut() 238 static void _dpu_hw_setup_scaler3_de(struct dpu_hw_blk_reg_map *c, in _dpu_hw_setup_scaler3_de() 282 void dpu_hw_setup_scaler3(struct dpu_hw_blk_reg_map *c, in dpu_hw_setup_scaler3() 384 void dpu_hw_csc_setup(struct dpu_hw_blk_reg_map *c, in dpu_hw_csc_setup() 460 void _dpu_hw_setup_qos_lut(struct dpu_hw_blk_reg_map *c, u32 offset, in _dpu_hw_setup_qos_lut() 481 void dpu_hw_setup_misr(struct dpu_hw_blk_reg_map *c, in dpu_hw_setup_misr() 496 int dpu_hw_collect_misr(struct dpu_hw_blk_reg_map *c, in dpu_hw_collect_misr() [all …]
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D | dpu_hw_lm.c | 53 struct dpu_hw_blk_reg_map *c = &ctx->hw; in dpu_hw_lm_setup_out() 74 struct dpu_hw_blk_reg_map *c = &ctx->hw; in dpu_hw_lm_setup_border_color() 99 struct dpu_hw_blk_reg_map *c = &ctx->hw; in dpu_hw_lm_setup_blend_config_combined_alpha() 118 struct dpu_hw_blk_reg_map *c = &ctx->hw; in dpu_hw_lm_setup_blend_config() 136 struct dpu_hw_blk_reg_map *c = &ctx->hw; in dpu_hw_lm_setup_color3()
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D | dpu_hw_top.c | 35 struct dpu_hw_blk_reg_map *c; in dpu_hw_setup_split_pipe() 86 struct dpu_hw_blk_reg_map *c; in dpu_hw_get_danger_status() 115 struct dpu_hw_blk_reg_map *c; in dpu_hw_setup_wd_timer() 171 struct dpu_hw_blk_reg_map *c; in dpu_hw_setup_vsync_sel() 198 struct dpu_hw_blk_reg_map *c; in dpu_hw_get_safe_status() 226 struct dpu_hw_blk_reg_map *c; in dpu_hw_intf_audio_select() 239 struct dpu_hw_blk_reg_map *c = &mdp->hw; in dpu_hw_dp_phy_intf_sel()
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D | dpu_hw_dsc.c | 40 struct dpu_hw_blk_reg_map *c = &dsc->hw; in dpu_hw_dsc_disable() 50 struct dpu_hw_blk_reg_map *c = &hw_dsc->hw; in dpu_hw_dsc_config() 131 struct dpu_hw_blk_reg_map *c = &hw_dsc->hw; in dpu_hw_dsc_config_thresh() 164 struct dpu_hw_blk_reg_map *c = &hw_dsc->hw; in dpu_hw_dsc_bind_pingpong_blk()
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D | dpu_hw_ctl.c | 82 struct dpu_hw_blk_reg_map *c = &ctx->hw; in dpu_hw_ctl_get_flush_register() 387 struct dpu_hw_blk_reg_map *c = &ctx->hw; in dpu_hw_ctl_poll_reset_status() 409 struct dpu_hw_blk_reg_map *c = &ctx->hw; in dpu_hw_ctl_reset_control() 421 struct dpu_hw_blk_reg_map *c = &ctx->hw; in dpu_hw_ctl_wait_reset_status() 440 struct dpu_hw_blk_reg_map *c = &ctx->hw; in dpu_hw_ctl_clear_all_blendstages() 483 struct dpu_hw_blk_reg_map *c = &ctx->hw; in dpu_hw_ctl_setup_blendstage() 546 struct dpu_hw_blk_reg_map *c = &ctx->hw; in dpu_hw_ctl_intf_cfg_v1() 591 struct dpu_hw_blk_reg_map *c = &ctx->hw; in dpu_hw_ctl_intf_cfg() 624 struct dpu_hw_blk_reg_map *c = &ctx->hw; in dpu_hw_ctl_reset_intf_cfg_v1()
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D | dpu_hw_wb.c | 58 struct dpu_hw_blk_reg_map *c = &ctx->hw; in dpu_hw_wb_setup_outaddress() 69 struct dpu_hw_blk_reg_map *c = &ctx->hw; in dpu_hw_wb_setup_format() 128 struct dpu_hw_blk_reg_map *c = &ctx->hw; in dpu_hw_wb_roi() 165 struct dpu_hw_blk_reg_map *c; in dpu_hw_wb_bind_pingpong_blk()
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D | dpu_hw_cdm.c | 76 struct dpu_hw_blk_reg_map *c = &ctx->hw; in dpu_hw_cdm_setup_cdwn() 172 struct dpu_hw_blk_reg_map *c = &ctx->hw; in dpu_hw_cdm_enable() 209 struct dpu_hw_blk_reg_map *c; in dpu_hw_cdm_bind_pingpong_blk()
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D | dpu_hw_dsc_1_2.c | 73 struct dpu_hw_blk_reg_map *hw; in dpu_hw_dsc_disable_1_2() 92 struct dpu_hw_blk_reg_map *hw; in dpu_hw_dsc_config_1_2() 244 struct dpu_hw_blk_reg_map *hw; in dpu_hw_dsc_config_thresh_1_2() 349 struct dpu_hw_blk_reg_map *hw; in dpu_hw_dsc_bind_pingpong_blk_1_2()
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D | dpu_hw_merge3d.h | 28 struct dpu_hw_blk_reg_map hw;
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D | dpu_hw_dspp.h | 61 struct dpu_hw_blk_reg_map hw;
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D | dpu_hw_wb.h | 67 struct dpu_hw_blk_reg_map hw;
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D | dpu_hw_dsc.h | 55 struct dpu_hw_blk_reg_map hw;
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D | dpu_hw_interrupts.h | 61 struct dpu_hw_blk_reg_map hw;
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D | dpu_hw_vbif.h | 98 struct dpu_hw_blk_reg_map hw;
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D | dpu_hw_merge3d.c | 22 struct dpu_hw_blk_reg_map *c; in dpu_hw_merge_3d_setup_3d_mode()
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D | dpu_hw_cdm.h | 115 struct dpu_hw_blk_reg_map hw;
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D | dpu_hw_lm.h | 71 struct dpu_hw_blk_reg_map hw;
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D | dpu_hw_pingpong.h | 100 struct dpu_hw_blk_reg_map hw;
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D | dpu_hw_top.h | 151 struct dpu_hw_blk_reg_map hw;
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D | dpu_hw_intf.h | 123 struct dpu_hw_blk_reg_map hw;
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D | dpu_hw_ctl.h | 267 struct dpu_hw_blk_reg_map hw;
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