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Searched refs:dprefclk_khz (Results 1 – 25 of 30) sorted by relevance

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/linux-6.12.1/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn201/
Ddcn201_clk_mgr.c200 clk_mgr->base.dprefclk_khz = REG_READ(CLK4_CLK2_CURRENT_CNT); in dcn201_clk_mgr_construct()
201 clk_mgr->base.dprefclk_khz *= 100; in dcn201_clk_mgr_construct()
203 if (clk_mgr->base.dprefclk_khz == 0) in dcn201_clk_mgr_construct()
204 clk_mgr->base.dprefclk_khz = 600000; in dcn201_clk_mgr_construct()
/linux-6.12.1/drivers/gpu/drm/amd/display/dc/clk_mgr/dce120/
Ddce120_clk_mgr.c136 clk_mgr->base.dprefclk_khz = 600000; in dce120_clk_mgr_construct()
143 clk_mgr->base.dprefclk_khz = 625000; in dce121_clk_mgr_construct()
/linux-6.12.1/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn301/
Ddcn301_smu.c164 DC_LOG_DEBUG("%s %d\n", __func__, clk_mgr->base.dprefclk_khz / 1000); in dcn301_smu_set_dprefclk()
169 khz_to_mhz_ceil(clk_mgr->base.dprefclk_khz)); in dcn301_smu_set_dprefclk()
Dvg_clk_mgr.c728 clk_mgr->base.base.dprefclk_khz = 600000; in vg_clk_mgr_construct()
/linux-6.12.1/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn314/
Ddcn314_smu.c196 return clk_mgr->base.dprefclk_khz; in dcn314_smu_set_dprefclk()
201 khz_to_mhz_ceil(clk_mgr->base.dprefclk_khz)); in dcn314_smu_set_dprefclk()
Ddcn314_clk_mgr.c200 dce_adjust_dp_ref_freq_for_ss(clk_mgr_int, clk_mgr->dprefclk_khz); in dcn314_init_clocks()
202 clk_mgr->dp_dto_source_clock_in_khz = clk_mgr->dprefclk_khz; in dcn314_init_clocks()
847 clk_mgr->base.base.dprefclk_khz = 600000; in dcn314_clk_mgr_construct()
/linux-6.12.1/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn31/
Ddcn31_smu.c177 return clk_mgr->base.dprefclk_khz; in dcn31_smu_set_dprefclk()
182 khz_to_mhz_ceil(clk_mgr->base.dprefclk_khz)); in dcn31_smu_set_dprefclk()
Ddcn31_clk_mgr.c736 clk_mgr->base.base.dprefclk_khz = 600000; in dcn31_clk_mgr_construct()
/linux-6.12.1/drivers/gpu/drm/amd/display/dc/inc/hw/
Dclk_mgr.h263 uint32_t dprefclk_khz; member
333 …int dprefclk_khz; // Used by program pixel clock in clock source funcs, need to figureout where th… member
/linux-6.12.1/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn35/
Ddcn35_smu.c215 return clk_mgr->base.dprefclk_khz; in dcn35_smu_set_dprefclk()
220 khz_to_mhz_ceil(clk_mgr->base.dprefclk_khz)); in dcn35_smu_set_dprefclk()
Ddcn35_clk_mgr.c528 dce_adjust_dp_ref_freq_for_ss(clk_mgr_int, clk_mgr->dprefclk_khz); in dcn35_init_clocks()
530 clk_mgr->dp_dto_source_clock_in_khz = clk_mgr->dprefclk_khz; in dcn35_init_clocks()
1142 clk_mgr->base.base.dprefclk_khz = dcn35_smu_get_dprefclk(&clk_mgr->base); in dcn35_clk_mgr_construct()
/linux-6.12.1/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn10/
Drv1_clk_mgr_vbios_smu.c153 khz_to_mhz_ceil(clk_mgr->base.dprefclk_khz)); in rv1_vbios_smu_set_dprefclk()
Drv1_clk_mgr.c331 clk_mgr->base.dprefclk_khz = 600000; in rv1_clk_mgr_construct()
/linux-6.12.1/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn315/
Ddcn315_clk_mgr.c663 clk_mgr->base.base.dprefclk_khz = 600000; in dcn315_clk_mgr_construct()
664 clk_mgr->base.base.dprefclk_khz = dcn315_smu_get_dpref_clk(&clk_mgr->base); in dcn315_clk_mgr_construct()
665 clk_mgr->base.base.clks.ref_dtbclk_khz = clk_mgr->base.base.dprefclk_khz; in dcn315_clk_mgr_construct()
667 …ks.ref_dtbclk_khz = dce_adjust_dp_ref_freq_for_ss(&clk_mgr->base, clk_mgr->base.base.dprefclk_khz); in dcn315_clk_mgr_construct()
/linux-6.12.1/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn316/
Ddcn316_clk_mgr.c643 clk_mgr->base.base.dprefclk_khz = 600000; in dcn316_clk_mgr_construct()
644 clk_mgr->base.base.dprefclk_khz = dcn316_smu_get_dpref_clk(&clk_mgr->base); in dcn316_clk_mgr_construct()
645 clk_mgr->base.base.clks.ref_dtbclk_khz = clk_mgr->base.base.dprefclk_khz; in dcn316_clk_mgr_construct()
/linux-6.12.1/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn21/
Drn_clk_mgr_vbios_smu.c174 khz_to_mhz_ceil(clk_mgr->base.dprefclk_khz)); in rn_vbios_smu_set_dprefclk()
Drn_clk_mgr.c765 clk_mgr->base.dprefclk_khz = 600000; in rn_clk_mgr_construct()
/linux-6.12.1/drivers/gpu/drm/amd/display/dc/dce/
Ddce_clock_source.c973 unsigned int dp_dto_ref_khz = clock_source->ctx->dc->clk_mgr->dprefclk_khz; in dcn31_program_pix_clk()
1087 dtbclk_p_src_clk_khz = clock_source->ctx->dc->clk_mgr->dprefclk_khz; in dcn401_program_pix_clk()
1196 unsigned int dp_dto_ref_khz = clock_source->ctx->dc->clk_mgr->dprefclk_khz; in get_pixel_clk_frequency_100hz()
1295 clock_source->ctx->dc->clk_mgr->dprefclk_khz*1000); in dcn20_program_pix_clk()
1331 unsigned int dp_dto_ref_khz = clock_source->ctx->dc->clk_mgr->dprefclk_khz; in dcn3_program_pix_clk()
Ddce_clk_mgr.c178 return clk_mgr_adjust_dp_ref_freq_for_ss(clk_mgr_dce, clk_mgr_dce->dprefclk_khz); in dce12_get_dp_ref_freq_khz()
934 clk_mgr_dce->dprefclk_khz = 600000; in dce120_clk_mgr_create()
955 clk_mgr_dce->dprefclk_khz = 625000; in dce121_clk_mgr_create()
/linux-6.12.1/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn30/
Ddcn30_clk_mgr.c540 clk_mgr->base.dprefclk_khz = 730000; // 700 MHz planned if VCO is 3.85 GHz, will be retrieved in dcn3_clk_mgr_construct()
554 clk_mgr->base.dprefclk_khz = s.dprefclk * 1000; in dcn3_clk_mgr_construct()
/linux-6.12.1/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn20/
Ddcn20_clk_mgr.c553 clk_mgr->base.dprefclk_khz = 700000; // 700 MHz planned if VCO is 3.85 GHz, will be retrieved in dcn20_clk_mgr_construct()
581 clk_mgr->base.dprefclk_khz = (DENTIST_DIVIDER_RANGE_SCALE_FACTOR in dcn20_clk_mgr_construct()
/linux-6.12.1/drivers/gpu/drm/amd/display/dc/clk_mgr/dce100/
Ddce_clk_mgr.c159 return dce_adjust_dp_ref_freq_for_ss(clk_mgr_dce, clk_mgr_base->dprefclk_khz); in dce12_get_dp_ref_freq_khz()
/linux-6.12.1/drivers/gpu/drm/amd/display/dc/dml/dcn401/
Ddcn401_fpu.c171 dc->dml2_options.bbox_overrides.dprefclk_mhz = dc->clk_mgr->dprefclk_khz / 1000.0; in dcn401_update_bw_bounding_box_fpu()
/linux-6.12.1/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn32/
Ddcn32_clk_mgr.c1179 clk_mgr->base.dprefclk_khz = 716666; in dcn32_clk_mgr_construct()
1204 clk_mgr->base.dprefclk_khz = clk_mgr->base.boot_snapshot.dprefclk; in dcn32_clk_mgr_construct()
/linux-6.12.1/drivers/gpu/drm/amd/display/dc/resource/dcn401/
Ddcn401_resource.c1679 if (pixel_clk_params->requested_pix_clk_100hz > 4 * stream->ctx->dc->clk_mgr->dprefclk_khz * 10) { in dcn401_build_pipe_pix_clk_params()
1681 …} else if (pixel_clk_params->requested_pix_clk_100hz > 2 * stream->ctx->dc->clk_mgr->dprefclk_khz in dcn401_build_pipe_pix_clk_params()
1683 …} else if (pixel_clk_params->requested_pix_clk_100hz > stream->ctx->dc->clk_mgr->dprefclk_khz * 10… in dcn401_build_pipe_pix_clk_params()

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