Searched refs:dpm_table_start (Results 1 – 17 of 17) sorted by relevance
/linux-6.12.1/drivers/gpu/drm/radeon/ |
D | kv_dpm.c | 307 pi->dpm_table_start = tmp; in kv_process_firmware_header() 327 pi->dpm_table_start + in kv_enable_dpm_voltage_scaling() 343 pi->dpm_table_start + in kv_set_dpm_interval() 357 pi->dpm_table_start + in kv_set_dpm_boot_state() 548 pi->dpm_table_start + in kv_update_sclk_t() 597 pi->dpm_table_start + in kv_enable_auto_thermal_throttling() 611 pi->dpm_table_start + in kv_upload_dpm_settings() 621 pi->dpm_table_start + in kv_upload_dpm_settings() 702 pi->dpm_table_start + in kv_populate_uvd_table() 712 pi->dpm_table_start + in kv_populate_uvd_table() [all …]
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D | kv_dpm.h | 122 u32 dpm_table_start; member
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D | ci_dpm.h | 216 u32 dpm_table_start; member
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D | ci_dpm.c | 1298 pi->dpm_table_start + in ci_update_sclk_t() 1787 pi->dpm_table_start = tmp; in ci_process_firmware_header() 3236 u32 level_array_address = pi->dpm_table_start + in ci_populate_all_graphic_levels() 3283 u32 level_array_address = pi->dpm_table_start + in ci_populate_all_memory_levels() 3648 pi->dpm_table_start + in ci_init_smc_table()
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/linux-6.12.1/drivers/gpu/drm/amd/pm/legacy-dpm/ |
D | kv_dpm.c | 583 pi->dpm_table_start = tmp; in kv_process_firmware_header() 603 pi->dpm_table_start + in kv_enable_dpm_voltage_scaling() 619 pi->dpm_table_start + in kv_set_dpm_interval() 633 pi->dpm_table_start + in kv_set_dpm_boot_state() 780 pi->dpm_table_start + in kv_update_sclk_t() 829 pi->dpm_table_start + in kv_enable_auto_thermal_throttling() 843 pi->dpm_table_start + in kv_upload_dpm_settings() 853 pi->dpm_table_start + in kv_upload_dpm_settings() 934 pi->dpm_table_start + in kv_populate_uvd_table() 944 pi->dpm_table_start + in kv_populate_uvd_table() [all …]
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D | kv_dpm.h | 148 u32 dpm_table_start; member
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/linux-6.12.1/drivers/gpu/drm/amd/pm/powerplay/smumgr/ |
D | ci_smumgr.h | 63 uint32_t dpm_table_start; member
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D | polaris10_smumgr.c | 123 uint32_t dpm_table_start; in polaris10_setup_graphics_level_structure() local 133 &dpm_table_start, 0x40000), in polaris10_setup_graphics_level_structure() 140 vr_config_address = dpm_table_start + offsetof(SMU74_Discrete_DpmTable, VRConfig); in polaris10_setup_graphics_level_structure() 147 graphics_level_address = dpm_table_start + offsetof(SMU74_Discrete_DpmTable, GraphicsLevel); in polaris10_setup_graphics_level_structure() 155 graphics_level_address = dpm_table_start + offsetof(SMU74_Discrete_DpmTable, MemoryLevel); in polaris10_setup_graphics_level_structure() 164 graphics_level_address = dpm_table_start + offsetof(SMU74_Discrete_DpmTable, BootMVdd); in polaris10_setup_graphics_level_structure() 1046 uint32_t array = smu_data->smu7_data.dpm_table_start + in polaris10_populate_all_graphic_levels() 1215 uint32_t array = smu_data->smu7_data.dpm_table_start + in polaris10_populate_all_memory_levels() 2119 smu_data->smu7_data.dpm_table_start + in polaris10_init_smc_table() 2292 mm_boot_level_offset = smu_data->smu7_data.dpm_table_start + offsetof(SMU74_Discrete_DpmTable, in polaris10_update_uvd_smc_table() [all …]
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D | smu7_smumgr.h | 45 uint32_t dpm_table_start; member
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D | fiji_smumgr.c | 1010 uint32_t array = smu_data->smu7_data.dpm_table_start + in fiji_populate_all_graphic_levels() 1226 uint32_t array = smu_data->smu7_data.dpm_table_start + in fiji_populate_all_memory_levels() 2105 smu_data->smu7_data.dpm_table_start + in fiji_init_smc_table() 2279 smu_data->smu7_data.dpm_table_start + in fiji_update_sclk_threshold() 2376 mm_boot_level_offset = smu_data->smu7_data.dpm_table_start + offsetof(SMU73_Discrete_DpmTable, in fiji_update_uvd_smc_table() 2412 mm_boot_level_offset = smu_data->smu7_data.dpm_table_start + in fiji_update_vce_smc_table() 2460 smu_data->smu7_data.dpm_table_start = tmp; in fiji_process_firmware_header() 2557 uint32_t array = smu_data->smu7_data.dpm_table_start + in fiji_update_dpm_settings() 2560 uint32_t mclk_array = smu_data->smu7_data.dpm_table_start + in fiji_update_dpm_settings()
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D | vegam_smumgr.c | 239 smu_data->smu7_data.dpm_table_start = tmp; in vegam_process_firmware_header() 341 mm_boot_level_offset = smu_data->smu7_data.dpm_table_start + offsetof(SMU75_Discrete_DpmTable, in vegam_update_uvd_smc_table() 377 mm_boot_level_offset = smu_data->smu7_data.dpm_table_start + in vegam_update_vce_smc_table() 874 uint32_t array = smu_data->smu7_data.dpm_table_start + in vegam_populate_all_graphic_levels() 1041 uint32_t array = smu_data->smu7_data.dpm_table_start + in vegam_populate_all_memory_levels() 2134 smu_data->smu7_data.dpm_table_start + in vegam_init_smc_table() 2230 smu_data->smu7_data.dpm_table_start + in vegam_update_sclk_threshold()
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D | tonga_smumgr.c | 694 uint32_t level_array_address = smu_data->smu7_data.dpm_table_start + in tonga_populate_all_graphic_levels() 1096 smu_data->smu7_data.dpm_table_start + in tonga_populate_all_memory_levels() 2437 smu_data->smu7_data.dpm_table_start + offsetof(SMU72_Discrete_DpmTable, SystemFlags), in tonga_init_smc_table() 2582 smu_data->smu7_data.dpm_table_start + in tonga_update_sclk_threshold() 2687 mm_boot_level_offset = smu_data->smu7_data.dpm_table_start + in tonga_update_uvd_smc_table() 2722 mm_boot_level_offset = smu_data->smu7_data.dpm_table_start + in tonga_update_vce_smc_table() 2772 smu_data->smu7_data.dpm_table_start = tmp; in tonga_process_firmware_header() 3156 uint32_t array = smu_data->smu7_data.dpm_table_start + in tonga_update_dpm_settings() 3159 uint32_t mclk_array = smu_data->smu7_data.dpm_table_start + in tonga_update_dpm_settings()
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D | ci_smumgr.c | 478 uint32_t array = smu_data->dpm_table_start + in ci_populate_all_graphic_levels() 1309 …uint32_t level_array_address = smu_data->dpm_table_start + offsetof(SMU7_Discrete_DpmTable, Memory… in ci_populate_all_memory_levels() 2103 result = ci_copy_bytes_to_smc(hwmgr, smu_data->dpm_table_start + in ci_init_smc_table() 2229 smu_data->dpm_table_start + in ci_update_sclk_threshold() 2386 ci_data->dpm_table_start = tmp; in ci_process_firmware_header() 2769 uint32_t array = smu_data->dpm_table_start + in ci_update_dpm_settings() 2772 uint32_t mclk_array = smu_data->dpm_table_start + in ci_update_dpm_settings()
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D | iceland_smumgr.c | 964 uint32_t level_array_adress = smu_data->smu7_data.dpm_table_start + in iceland_populate_all_graphic_levels() 1354 …uint32_t level_array_adress = smu_data->smu7_data.dpm_table_start + offsetof(SMU71_Discrete_DpmTab… in iceland_populate_all_memory_levels() 2057 result = smu7_copy_bytes_to_smc(hwmgr, smu_data->smu7_data.dpm_table_start + in iceland_init_smc_table() 2192 smu_data->smu7_data.dpm_table_start + in iceland_update_sclk_threshold() 2293 smu7_data->dpm_table_start = tmp; in iceland_process_firmware_header()
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/linux-6.12.1/drivers/gpu/drm/amd/pm/powerplay/hwmgr/ |
D | smu10_hwmgr.h | 244 uint32_t dpm_table_start; member
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D | smu8_hwmgr.h | 258 uint32_t dpm_table_start; member
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D | smu7_hwmgr.c | 5368 smu_data->smu7_data.dpm_table_start + offsetof(SMU74_Discrete_DpmTable, DisplayWatermark), in smu7_set_watermarks_for_clocks_ranges()
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