| /linux-6.12.1/drivers/gpu/drm/amd/pm/swsmu/smu14/ |
| D | smu_v14_0_0_ppt.c | 632 uint32_t dpm_level, in smu_v14_0_1_get_dpm_freq_by_index() argument
642 if (dpm_level >= clk_table->NumSocClkLevelsEnabled) in smu_v14_0_1_get_dpm_freq_by_index()
644 *freq = clk_table->SocClocks[dpm_level]; in smu_v14_0_1_get_dpm_freq_by_index()
647 if (dpm_level >= clk_table->Vcn0ClkLevelsEnabled) in smu_v14_0_1_get_dpm_freq_by_index()
649 *freq = clk_table->VClocks0[dpm_level]; in smu_v14_0_1_get_dpm_freq_by_index()
652 if (dpm_level >= clk_table->Vcn0ClkLevelsEnabled) in smu_v14_0_1_get_dpm_freq_by_index()
654 *freq = clk_table->DClocks0[dpm_level]; in smu_v14_0_1_get_dpm_freq_by_index()
657 if (dpm_level >= clk_table->Vcn1ClkLevelsEnabled) in smu_v14_0_1_get_dpm_freq_by_index()
659 *freq = clk_table->VClocks1[dpm_level]; in smu_v14_0_1_get_dpm_freq_by_index()
662 if (dpm_level >= clk_table->Vcn1ClkLevelsEnabled) in smu_v14_0_1_get_dpm_freq_by_index()
[all …]
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| D | smu_v14_0.c | 1805 if (smu_dpm->dpm_level != AMD_DPM_FORCED_LEVEL_MANUAL) in smu_v14_0_od_edit_dpm_table()
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| /linux-6.12.1/drivers/gpu/drm/amd/pm/swsmu/smu12/ |
| D | renoir_ppt.c | 203 uint32_t dpm_level, uint32_t *freq) in renoir_get_dpm_clk_limited() argument
212 if (dpm_level >= NUM_SOCCLK_DPM_LEVELS) in renoir_get_dpm_clk_limited()
214 *freq = clk_table->SocClocks[dpm_level].Freq; in renoir_get_dpm_clk_limited()
218 if (dpm_level >= NUM_FCLK_DPM_LEVELS) in renoir_get_dpm_clk_limited()
220 *freq = clk_table->FClocks[dpm_level].Freq; in renoir_get_dpm_clk_limited()
223 if (dpm_level >= NUM_DCFCLK_DPM_LEVELS) in renoir_get_dpm_clk_limited()
225 *freq = clk_table->DcfClocks[dpm_level].Freq; in renoir_get_dpm_clk_limited()
228 if (dpm_level >= NUM_FCLK_DPM_LEVELS) in renoir_get_dpm_clk_limited()
230 *freq = clk_table->FClocks[dpm_level].Freq; in renoir_get_dpm_clk_limited()
233 if (dpm_level >= NUM_VCN_DPM_LEVELS) in renoir_get_dpm_clk_limited()
[all …]
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| /linux-6.12.1/drivers/gpu/drm/amd/pm/swsmu/smu13/ |
| D | smu_v13_0_5_ppt.c | 518 if (smu_dpm->dpm_level != AMD_DPM_FORCED_LEVEL_MANUAL) in smu_v13_0_5_od_edit_dpm_table()
654 uint32_t dpm_level, in smu_v13_0_5_get_dpm_freq_by_index() argument
664 if (dpm_level >= clk_table->NumSocClkLevelsEnabled) in smu_v13_0_5_get_dpm_freq_by_index()
666 *freq = clk_table->SocClocks[dpm_level]; in smu_v13_0_5_get_dpm_freq_by_index()
669 if (dpm_level >= clk_table->VcnClkLevelsEnabled) in smu_v13_0_5_get_dpm_freq_by_index()
671 *freq = clk_table->VClocks[dpm_level]; in smu_v13_0_5_get_dpm_freq_by_index()
674 if (dpm_level >= clk_table->VcnClkLevelsEnabled) in smu_v13_0_5_get_dpm_freq_by_index()
676 *freq = clk_table->DClocks[dpm_level]; in smu_v13_0_5_get_dpm_freq_by_index()
680 if (dpm_level >= clk_table->NumDfPstatesEnabled) in smu_v13_0_5_get_dpm_freq_by_index()
682 *freq = clk_table->DfPstateTable[dpm_level].MemClk; in smu_v13_0_5_get_dpm_freq_by_index()
[all …]
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| D | smu_v13_0_4_ppt.c | 426 uint32_t dpm_level, in smu_v13_0_4_get_dpm_freq_by_index() argument
436 if (dpm_level >= clk_table->NumSocClkLevelsEnabled) in smu_v13_0_4_get_dpm_freq_by_index()
438 *freq = clk_table->SocClocks[dpm_level]; in smu_v13_0_4_get_dpm_freq_by_index()
441 if (dpm_level >= clk_table->VcnClkLevelsEnabled) in smu_v13_0_4_get_dpm_freq_by_index()
443 *freq = clk_table->VClocks[dpm_level]; in smu_v13_0_4_get_dpm_freq_by_index()
446 if (dpm_level >= clk_table->VcnClkLevelsEnabled) in smu_v13_0_4_get_dpm_freq_by_index()
448 *freq = clk_table->DClocks[dpm_level]; in smu_v13_0_4_get_dpm_freq_by_index()
452 if (dpm_level >= clk_table->NumDfPstatesEnabled) in smu_v13_0_4_get_dpm_freq_by_index()
454 *freq = clk_table->DfPstateTable[dpm_level].MemClk; in smu_v13_0_4_get_dpm_freq_by_index()
457 if (dpm_level >= clk_table->NumDfPstatesEnabled) in smu_v13_0_4_get_dpm_freq_by_index()
[all …]
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| D | yellow_carp_ppt.c | 649 if (smu_dpm->dpm_level != AMD_DPM_FORCED_LEVEL_MANUAL) in yellow_carp_od_edit_dpm_table()
788 uint32_t dpm_level, in yellow_carp_get_dpm_freq_by_index() argument
798 if (dpm_level >= clk_table->NumSocClkLevelsEnabled) in yellow_carp_get_dpm_freq_by_index()
800 *freq = clk_table->SocClocks[dpm_level]; in yellow_carp_get_dpm_freq_by_index()
803 if (dpm_level >= clk_table->VcnClkLevelsEnabled) in yellow_carp_get_dpm_freq_by_index()
805 *freq = clk_table->VClocks[dpm_level]; in yellow_carp_get_dpm_freq_by_index()
808 if (dpm_level >= clk_table->VcnClkLevelsEnabled) in yellow_carp_get_dpm_freq_by_index()
810 *freq = clk_table->DClocks[dpm_level]; in yellow_carp_get_dpm_freq_by_index()
814 if (dpm_level >= clk_table->NumDfPstatesEnabled) in yellow_carp_get_dpm_freq_by_index()
816 *freq = clk_table->DfPstateTable[dpm_level].MemClk; in yellow_carp_get_dpm_freq_by_index()
[all …]
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| D | aldebaran_ppt.c | 1275 if ((smu_dpm->dpm_level == AMD_DPM_FORCED_LEVEL_PERF_DETERMINISM) && in aldebaran_set_performance_level()
1315 if ((smu_dpm->dpm_level != AMD_DPM_FORCED_LEVEL_MANUAL) in aldebaran_set_soft_freq_limited_range()
1316 && (smu_dpm->dpm_level != AMD_DPM_FORCED_LEVEL_PERF_DETERMINISM)) in aldebaran_set_soft_freq_limited_range()
1319 if (smu_dpm->dpm_level == AMD_DPM_FORCED_LEVEL_MANUAL) { in aldebaran_set_soft_freq_limited_range()
1340 if (smu_dpm->dpm_level == AMD_DPM_FORCED_LEVEL_PERF_DETERMINISM) { in aldebaran_set_soft_freq_limited_range()
1381 if ((smu_dpm->dpm_level != AMD_DPM_FORCED_LEVEL_MANUAL) in aldebaran_usr_edit_dpm_table()
1382 && (smu_dpm->dpm_level != AMD_DPM_FORCED_LEVEL_PERF_DETERMINISM)) in aldebaran_usr_edit_dpm_table()
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| D | smu_v13_0_6_ppt.c | 1717 if ((smu_dpm->dpm_level == AMD_DPM_FORCED_LEVEL_PERF_DETERMINISM) && in smu_v13_0_6_set_performance_level()
1775 if ((smu_dpm->dpm_level != AMD_DPM_FORCED_LEVEL_MANUAL) && in smu_v13_0_6_set_soft_freq_limited_range()
1776 (smu_dpm->dpm_level != AMD_DPM_FORCED_LEVEL_PERF_DETERMINISM)) in smu_v13_0_6_set_soft_freq_limited_range()
1779 if (smu_dpm->dpm_level == AMD_DPM_FORCED_LEVEL_MANUAL) { in smu_v13_0_6_set_soft_freq_limited_range()
1817 if (smu_dpm->dpm_level == AMD_DPM_FORCED_LEVEL_PERF_DETERMINISM) { in smu_v13_0_6_set_soft_freq_limited_range()
1862 if ((smu_dpm->dpm_level != AMD_DPM_FORCED_LEVEL_MANUAL) && in smu_v13_0_6_usr_edit_dpm_table()
1863 (smu_dpm->dpm_level != AMD_DPM_FORCED_LEVEL_PERF_DETERMINISM)) in smu_v13_0_6_usr_edit_dpm_table()
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| D | smu_v13_0.c | 2374 if (smu_dpm->dpm_level != AMD_DPM_FORCED_LEVEL_MANUAL) in smu_v13_0_od_edit_dpm_table()
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| /linux-6.12.1/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn30/ |
| D | dcn30_clk_mgr_smu_msg.c | 261 … dcn30_smu_get_dpm_freq_by_index(struct clk_mgr_internal *clk_mgr, uint32_t clk, uint8_t dpm_level) in dcn30_smu_get_dpm_freq_by_index() argument
266 uint32_t param = (clk << 16) | dpm_level; in dcn30_smu_get_dpm_freq_by_index()
268 smu_print("SMU Get dpm freq by index: clk = %d, dpm_level = %d\n", clk, dpm_level); in dcn30_smu_get_dpm_freq_by_index()
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| D | dcn30_clk_mgr_smu_msg.h | 43 …dcn30_smu_get_dpm_freq_by_index(struct clk_mgr_internal *clk_mgr, uint32_t clk, uint8_t dpm_level);
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| /linux-6.12.1/drivers/gpu/drm/amd/pm/swsmu/smu11/ |
| D | vangogh_ppt.c | 518 uint32_t dpm_level, uint32_t *freq) in vangogh_get_dpm_clk_limited() argument
527 if (dpm_level >= clk_table->NumSocClkLevelsEnabled) in vangogh_get_dpm_clk_limited()
529 *freq = clk_table->SocClocks[dpm_level]; in vangogh_get_dpm_clk_limited()
532 if (dpm_level >= clk_table->VcnClkLevelsEnabled) in vangogh_get_dpm_clk_limited()
534 *freq = clk_table->VcnClocks[dpm_level].vclk; in vangogh_get_dpm_clk_limited()
537 if (dpm_level >= clk_table->VcnClkLevelsEnabled) in vangogh_get_dpm_clk_limited()
539 *freq = clk_table->VcnClocks[dpm_level].dclk; in vangogh_get_dpm_clk_limited()
543 if (dpm_level >= clk_table->NumDfPstatesEnabled) in vangogh_get_dpm_clk_limited()
545 *freq = clk_table->DfPstateTable[dpm_level].memclk; in vangogh_get_dpm_clk_limited()
549 if (dpm_level >= clk_table->NumDfPstatesEnabled) in vangogh_get_dpm_clk_limited()
[all …]
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| /linux-6.12.1/drivers/gpu/drm/amd/pm/powerplay/hwmgr/ |
| D | smu_helper.c | 356 dpm_table->dpm_level[i].enabled = false; in phm_reset_single_dpm_table()
367 dpm_table->dpm_level[index].value = pcie_gen; in phm_setup_pcie_table_entry()
368 dpm_table->dpm_level[index].param1 = pcie_lanes; in phm_setup_pcie_table_entry()
369 dpm_table->dpm_level[index].enabled = 1; in phm_setup_pcie_table_entry()
380 if (dpm_table->dpm_level[i - 1].enabled) in phm_get_dpm_level_enable_mask_value()
451 if (value == dpm_table->dpm_level[i].value) { in phm_find_boot_level()
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| D | pp_psm.c | 295 hwmgr->dpm_level = hwmgr->request_dpm_level; in psm_adjust_power_state_dynamic()
297 if (hwmgr->dpm_level != AMD_DPM_FORCED_LEVEL_MANUAL) { in psm_adjust_power_state_dynamic()
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| D | vega12_hwmgr.c | 2384 if (hwmgr->dpm_level == AMD_DPM_FORCED_LEVEL_PROFILE_MIN_SCLK) { in vega12_apply_clocks_adjust_rules()
2389 if (hwmgr->dpm_level == AMD_DPM_FORCED_LEVEL_PROFILE_PEAK) { in vega12_apply_clocks_adjust_rules()
2408 if (hwmgr->dpm_level == AMD_DPM_FORCED_LEVEL_PROFILE_MIN_MCLK) { in vega12_apply_clocks_adjust_rules()
2413 if (hwmgr->dpm_level == AMD_DPM_FORCED_LEVEL_PROFILE_PEAK) { in vega12_apply_clocks_adjust_rules()
2452 if (hwmgr->dpm_level == AMD_DPM_FORCED_LEVEL_PROFILE_PEAK) { in vega12_apply_clocks_adjust_rules()
2471 if (hwmgr->dpm_level == AMD_DPM_FORCED_LEVEL_PROFILE_PEAK) { in vega12_apply_clocks_adjust_rules()
2490 if (hwmgr->dpm_level == AMD_DPM_FORCED_LEVEL_PROFILE_PEAK) { in vega12_apply_clocks_adjust_rules()
2509 if (hwmgr->dpm_level == AMD_DPM_FORCED_LEVEL_PROFILE_PEAK) { in vega12_apply_clocks_adjust_rules()
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| D | ppatomctrl.h | 320 uint32_t sclk, uint16_t virtual_voltage_Id, uint16_t *voltage, uint16_t dpm_level, bool debug);
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| D | vega20_hwmgr.c | 3766 if (hwmgr->dpm_level == AMD_DPM_FORCED_LEVEL_PROFILE_MIN_SCLK) { in vega20_apply_clocks_adjust_rules()
3771 if (hwmgr->dpm_level == AMD_DPM_FORCED_LEVEL_PROFILE_PEAK) { in vega20_apply_clocks_adjust_rules()
3790 if (hwmgr->dpm_level == AMD_DPM_FORCED_LEVEL_PROFILE_MIN_MCLK) { in vega20_apply_clocks_adjust_rules()
3795 if (hwmgr->dpm_level == AMD_DPM_FORCED_LEVEL_PROFILE_PEAK) { in vega20_apply_clocks_adjust_rules()
3850 if (hwmgr->dpm_level == AMD_DPM_FORCED_LEVEL_PROFILE_PEAK) { in vega20_apply_clocks_adjust_rules()
3869 if (hwmgr->dpm_level == AMD_DPM_FORCED_LEVEL_PROFILE_PEAK) { in vega20_apply_clocks_adjust_rules()
3888 if (hwmgr->dpm_level == AMD_DPM_FORCED_LEVEL_PROFILE_PEAK) { in vega20_apply_clocks_adjust_rules()
3907 if (hwmgr->dpm_level == AMD_DPM_FORCED_LEVEL_PROFILE_PEAK) { in vega20_apply_clocks_adjust_rules()
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| D | hwmgr.c | 87 hwmgr->dpm_level = AMD_DPM_FORCED_LEVEL_AUTO; in hwmgr_early_init()
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| D | ppatomctrl.c | 686 uint16_t dpm_level, in atomctrl_calculate_voltage_evv_on_sclk() argument
735 switch (dpm_level) { in atomctrl_calculate_voltage_evv_on_sclk()
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| D | vega10_hwmgr.c | 4371 …if (level == AMD_DPM_FORCED_LEVEL_PROFILE_PEAK && hwmgr->dpm_level != AMD_DPM_FORCED_LEVEL_PROFILE… in vega10_dpm_force_dpm_level()
4373 …else if (level != AMD_DPM_FORCED_LEVEL_PROFILE_PEAK && hwmgr->dpm_level == AMD_DPM_FORCED_LEVEL_PR… in vega10_dpm_force_dpm_level()
4707 (hwmgr->dpm_level == AMD_DPM_FORCED_LEVEL_PROFILE_PEAK)) in vega10_emit_clock_levels()
4852 (hwmgr->dpm_level == AMD_DPM_FORCED_LEVEL_PROFILE_PEAK)) in vega10_print_clock_levels()
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| /linux-6.12.1/drivers/gpu/drm/amd/pm/swsmu/ |
| D | amdgpu_smu.c | 476 if (smu_dpm_ctx->dpm_level == AMD_DPM_FORCED_LEVEL_MANUAL) { in smu_restore_dpm_user_profile()
889 smu->smu_dpm.dpm_level, in smu_late_init()
1291 smu->smu_dpm.dpm_level = AMD_DPM_FORCED_LEVEL_AUTO; in smu_sw_init()
2203 if (!(smu_dpm_ctx->dpm_level & profile_mode_mask)) { in smu_enable_umd_pstate()
2206 smu_dpm_ctx->saved_dpm_level = smu_dpm_ctx->dpm_level; in smu_enable_umd_pstate()
2271 if (smu_dpm_ctx->dpm_level != level) { in smu_adjust_power_state_dynamic()
2279 smu_dpm_ctx->dpm_level = level; in smu_adjust_power_state_dynamic()
2282 if (smu_dpm_ctx->dpm_level != AMD_DPM_FORCED_LEVEL_MANUAL && in smu_adjust_power_state_dynamic()
2283 smu_dpm_ctx->dpm_level != AMD_DPM_FORCED_LEVEL_PERF_DETERMINISM) { in smu_adjust_power_state_dynamic()
2331 return smu_handle_task(smu, smu_dpm->dpm_level, task_id); in smu_handle_dpm_task()
[all …]
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| /linux-6.12.1/drivers/gpu/drm/amd/pm/powerplay/ |
| D | amd_powerplay.c | 366 if (!(hwmgr->dpm_level & profile_mode_mask)) { in pp_dpm_en_umd_pstate()
369 hwmgr->saved_dpm_level = hwmgr->dpm_level; in pp_dpm_en_umd_pstate()
390 if (level == hwmgr->dpm_level) in pp_dpm_force_performance_level()
408 return hwmgr->dpm_level; in pp_dpm_get_performance_level()
715 if (hwmgr->dpm_level != AMD_DPM_FORCED_LEVEL_MANUAL) { in pp_dpm_force_clock_level()
875 if (hwmgr->dpm_level != AMD_DPM_FORCED_LEVEL_MANUAL) { in pp_set_power_profile_mode()
964 if (hwmgr->dpm_level != AMD_DPM_FORCED_LEVEL_MANUAL) in pp_dpm_switch_power_profile()
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| /linux-6.12.1/drivers/gpu/drm/amd/pm/powerplay/inc/ |
| D | hwmgr.h | 63 struct vi_dpm_level dpm_level[]; member
764 enum amd_dpm_forced_level dpm_level; member
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| /linux-6.12.1/drivers/gpu/drm/amd/pm/swsmu/inc/ |
| D | amdgpu_smu.h | 390 enum amd_dpm_forced_level dpm_level; member
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| /linux-6.12.1/drivers/gpu/drm/amd/pm/powerplay/smumgr/ |
| D | ci_smumgr.c | 2884 if (hwmgr->dpm_level & profile_mode_mask || !PP_CAP(PHM_PlatformCaps_UVDDPM)) in ci_update_uvd_smc_table()
2916 if (hwmgr->dpm_level & profile_mode_mask || !PP_CAP(PHM_PlatformCaps_VCEDPM)) in ci_update_vce_smc_table()
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