Home
last modified time | relevance | path

Searched refs:dpcd_lane_status_updated (Results 1 – 6 of 6) sorted by relevance

/linux-6.12.1/drivers/gpu/drm/amd/display/dc/link/protocols/
Dlink_dp_training_128b_132b.c79 union lane_align_status_updated dpcd_lane_status_updated = {0}; in dp_perform_128b_132b_channel_eq_done_sequence() local
94 &dpcd_lane_status_updated, dpcd_lane_adjust, DPRX); in dp_perform_128b_132b_channel_eq_done_sequence()
112 &dpcd_lane_status_updated, dpcd_lane_adjust, DPRX); in dp_perform_128b_132b_channel_eq_done_sequence()
124 } else if (dpcd_lane_status_updated.bits.LT_FAILED_128b_132b) { in dp_perform_128b_132b_channel_eq_done_sequence()
137 } else if (dpcd_lane_status_updated.bits.EQ_INTERLANE_ALIGN_DONE_128b_132b) { in dp_perform_128b_132b_channel_eq_done_sequence()
142 } else if (dpcd_lane_status_updated.bits.LT_FAILED_128b_132b) { in dp_perform_128b_132b_channel_eq_done_sequence()
149 &dpcd_lane_status_updated, dpcd_lane_adjust, DPRX); in dp_perform_128b_132b_channel_eq_done_sequence()
164 union lane_align_status_updated dpcd_lane_status_updated = {0}; in dp_perform_128b_132b_cds_done_sequence() local
178 &dpcd_lane_status_updated, dpcd_lane_adjust, DPRX); in dp_perform_128b_132b_cds_done_sequence()
182 dpcd_lane_status_updated.bits.CDS_INTERLANE_ALIGN_DONE_128b_132b) { in dp_perform_128b_132b_cds_done_sequence()
[all …]
Dlink_dp_training_8b_10b.c166 union lane_align_status_updated dpcd_lane_status_updated; in perform_8b_10b_clock_recovery_sequence() local
173 memset(&dpcd_lane_status_updated, '\0', in perform_8b_10b_clock_recovery_sequence()
174 sizeof(dpcd_lane_status_updated)); in perform_8b_10b_clock_recovery_sequence()
224 &dpcd_lane_status_updated, in perform_8b_10b_clock_recovery_sequence()
285 union lane_align_status_updated dpcd_lane_status_updated = {0}; in perform_8b_10b_channel_equalization_sequence() local
329 &dpcd_lane_status_updated, in perform_8b_10b_channel_equalization_sequence()
345 dp_check_interlane_aligned(dpcd_lane_status_updated, link, retries_ch_eq)) in perform_8b_10b_channel_equalization_sequence()
Dlink_dp_training_fixed_vs_pe_retimer.c327 union lane_align_status_updated dpcd_lane_status_updated; in dp_perform_fixed_vs_pe_training_sequence() local
335 memset(&dpcd_lane_status_updated, '\0', in dp_perform_fixed_vs_pe_training_sequence()
336 sizeof(dpcd_lane_status_updated)); in dp_perform_fixed_vs_pe_training_sequence()
409 &dpcd_lane_status_updated, in dp_perform_fixed_vs_pe_training_sequence()
456 union lane_align_status_updated dpcd_lane_status_updated = {0}; in dp_perform_fixed_vs_pe_training_sequence() local
528 &dpcd_lane_status_updated, in dp_perform_fixed_vs_pe_training_sequence()
541 dp_is_interlane_aligned(dpcd_lane_status_updated)) { in dp_perform_fixed_vs_pe_training_sequence()
Dlink_dp_training_dpia.c297 union lane_align_status_updated dpcd_lane_status_updated = {0}; in dpia_training_cr_non_transparent() local
391 &dpcd_lane_status_updated, in dpia_training_cr_non_transparent()
463 union lane_align_status_updated dpcd_lane_status_updated = {0}; in dpia_training_cr_transparent() local
495 &dpcd_lane_status_updated, in dpia_training_cr_transparent()
591 union lane_align_status_updated dpcd_lane_status_updated = {0}; in dpia_training_eq_non_transparent() local
675 &dpcd_lane_status_updated, in dpia_training_eq_non_transparent()
691 dp_is_interlane_aligned(dpcd_lane_status_updated)) { in dpia_training_eq_non_transparent()
735 union lane_align_status_updated dpcd_lane_status_updated = {0}; in dpia_training_eq_transparent() local
758 &dpcd_lane_status_updated, in dpia_training_eq_transparent()
777 …if (dp_is_interlane_aligned(dpcd_lane_status_updated) || (link->skip_fallback_on_link_loss && retr… in dpia_training_eq_transparent()
Dlink_dp_irq_handler.c297 union lane_align_status_updated dpcd_lane_status_updated = {0}; in read_dpcd204h_on_irq_hpd() local
302 &dpcd_lane_status_updated.raw, in read_dpcd204h_on_irq_hpd()
307 dpcd_lane_status_updated.bits.EQ_INTERLANE_ALIGN_DONE_128b_132b; in read_dpcd204h_on_irq_hpd()
309 dpcd_lane_status_updated.bits.CDS_INTERLANE_ALIGN_DONE_128b_132b; in read_dpcd204h_on_irq_hpd()
Dlink_dp_training.c559 union lane_align_status_updated dpcd_lane_status_updated; in dp_check_link_loss_status() local
575 dpcd_lane_status_updated.raw = dpcd_buf[4]; in dp_check_link_loss_status()
580 !dp_is_interlane_aligned(dpcd_lane_status_updated)) { in dp_check_link_loss_status()
1411 union lane_align_status_updated dpcd_lane_status_updated = {0}; in perform_post_lt_adj_req_sequence() local
1428 &dpcd_lane_status_updated, in perform_post_lt_adj_req_sequence()
1432 if (dpcd_lane_status_updated.bits. in perform_post_lt_adj_req_sequence()
1441 !dp_is_interlane_aligned(dpcd_lane_status_updated)) in perform_post_lt_adj_req_sequence()