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Searched refs:dml_ceil (Results 1 – 24 of 24) sorted by relevance

/linux-6.12.1/drivers/gpu/drm/amd/display/dc/dml/dcn32/
Ddisplay_mode_vba_util_32.c222 dml_ceil((double) HTaps / 6.0, 1.0)); in dml32_CalculateSinglePipeDPPCLKAndSCLThroughput()
240 HRatioChroma / dml_ceil((double) HTapsChroma / 6.0, 1.0)); in dml32_CalculateSinglePipeDPPCLKAndSCLThroughput()
533 RoundedUpMaxSwathSizeBytesY[k] = dml_ceil((unsigned int) RoundedUpMaxSwathSizeBytesY[k], 256); in dml32_CalculateSwathAndDETConfiguration()
534 RoundedUpMaxSwathSizeBytesC[k] = dml_ceil((unsigned int) RoundedUpMaxSwathSizeBytesC[k], 256); in dml32_CalculateSwathAndDETConfiguration()
787 surface_width_ub_l = dml_ceil(SurfaceWidthY[k], Read256BytesBlockWidthY[k]); in dml32_CalculateSwathWidth()
788 surface_height_ub_l = dml_ceil(SurfaceHeightY[k], Read256BytesBlockHeightY[k]); in dml32_CalculateSwathWidth()
803 dml_ceil(SwathWidthY[k] - 1, in dml32_CalculateSwathWidth()
808 surface_width_ub_c = dml_ceil(SurfaceWidthC[k], Read256BytesBlockWidthC[k]); in dml32_CalculateSwathWidth()
818 dml_ceil(SwathWidthC[k] - 1, in dml32_CalculateSwathWidth()
835 swath_width_luma_ub[k] = dml_min(surface_height_ub_l, dml_ceil(SwathWidthY[k] - 1, in dml32_CalculateSwathWidth()
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Ddisplay_rq_dlg_calc_32.c294 …dst_x_after_scaler = dml_ceil(get_dst_x_after_scaler(mode_lib, e2e_pipe_param, num_pipes, pipe_idx… in dml32_rq_dlg_get_dlg_reg()
295 …dst_y_after_scaler = dml_ceil(get_dst_y_after_scaler(mode_lib, e2e_pipe_param, num_pipes, pipe_idx… in dml32_rq_dlg_get_dlg_reg()
Ddisplay_mode_vba_32.c700 dml_ceil((double) v->WritebackDelay[mode_lib->vba.VoltageLevel][k] in DISPCLKDPPCLKDCFCLKDeepSleepPrefetchParametersWatermarksAndPerformanceCalculation()
1446 dml_ceil(v->WritebackDelay[mode_lib->vba.VoltageLevel][k] in DISPCLKDPPCLKDCFCLKDeepSleepPrefetchParametersWatermarksAndPerformanceCalculation()
1833 v->ReadBandwidthLuma[k] = v->SwathWidthYSingleDPP[k] * dml_ceil(v->BytePerPixelInDETY[k], 1.0) in dml32_ModeSupportAndSystemConfigurationFull()
1835 …v->ReadBandwidthChroma[k] = v->SwathWidthYSingleDPP[k] / 2 * dml_ceil(v->BytePerPixelInDETC[k], 2.… in dml32_ModeSupportAndSystemConfigurationFull()
1940 / (mode_lib->vba.vtaps[k] + dml_max(dml_ceil(mode_lib->vba.VRatio[k], 1.0) - 2, 0.0)); in dml32_ModeSupportAndSystemConfigurationFull()
1947 + dml_max(dml_ceil(mode_lib->vba.VRatioChroma[k], 1.0) - 2, in dml32_ModeSupportAndSystemConfigurationFull()
2967 - dml_max(1.0, dml_ceil(1.0 * in dml32_ModeSupportAndSystemConfigurationFull()
3631 mode_lib->vba.AlignedYPitch[k] = dml_ceil( in dml32_ModeSupportAndSystemConfigurationFull()
3635 mode_lib->vba.AlignedDCCMetaPitchY[k] = dml_ceil( in dml32_ModeSupportAndSystemConfigurationFull()
3646 mode_lib->vba.AlignedCPitch[k] = dml_ceil( in dml32_ModeSupportAndSystemConfigurationFull()
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/linux-6.12.1/drivers/gpu/drm/amd/display/dc/dml/dcn21/
Ddisplay_mode_vba_21.c755 *VUpdateOffsetPix = dml_ceil(myPipe->HTotal / 4.0, 1); in CalculatePrefetchSchedule()
808 …*swath_width_luma_ub = dml_ceil(SwathWidthY - 1, myPipe->BlockWidth256BytesY) + myPipe->BlockWidth… in CalculatePrefetchSchedule()
810 …*swath_width_chroma_ub = dml_ceil(SwathWidthY / 2 - 1, myPipe->BlockWidth256BytesC) + myPipe->Bloc… in CalculatePrefetchSchedule()
812 …*swath_width_luma_ub = dml_ceil(SwathWidthY - 1, myPipe->BlockHeight256BytesY) + myPipe->BlockHeig… in CalculatePrefetchSchedule()
814 …*swath_width_chroma_ub = dml_ceil(SwathWidthY / 2 - 1, myPipe->BlockHeight256BytesC) + myPipe->Blo… in CalculatePrefetchSchedule()
817 …LinesY * *swath_width_luma_ub * dml_ceil(BytePerPixelDETY, 1) + PrefetchSourceLinesC * *swath_widt… in CalculatePrefetchSchedule()
834 Tvm_oto_lines = dml_ceil(4 * Tvm_oto / LineTime, 1) / 4.0; in CalculatePrefetchSchedule()
835 Tr0_oto_lines = dml_ceil(4 * Tr0_oto / LineTime, 1) / 4.0; in CalculatePrefetchSchedule()
836 Tsw_oto_lines = dml_ceil(4 * Tsw_oto / LineTime, 1) / 4.0; in CalculatePrefetchSchedule()
869 + PrefetchSourceLinesY * *swath_width_luma_ub * dml_ceil(BytePerPixelDETY, 1) in CalculatePrefetchSchedule()
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Ddisplay_rq_dlg_calc_21.c448 + dml_ceil((double) (log2_blk_bytes - 8) / 2.0, 1); in get_meta_and_pte_attr()
684 rq_dlg_param->dpte_groups_per_row_ub = dml_ceil( in get_meta_and_pte_attr()
1737 cur_width_ub = dml_ceil((double) cur_src_width / (double) cur_req_width, 1) in calculate_ttu_cursor()
/linux-6.12.1/drivers/gpu/drm/amd/display/dc/dml/dcn20/
Ddisplay_mode_vba_20.c546 *VUpdateOffsetPix = dml_ceil(HTotal / 4.0, 1); in CalculatePrefetchSchedule()
601 + PrefetchSourceLinesY * SwathWidthY * dml_ceil(BytePerPixelDETY, 1) in CalculatePrefetchSchedule()
602 + PrefetchSourceLinesC * SwathWidthY / 2 * dml_ceil(BytePerPixelDETC, 2)) in CalculatePrefetchSchedule()
657 + PrefetchSourceLinesY * SwathWidthY * dml_ceil(BytePerPixelDETY, 1) in CalculatePrefetchSchedule()
659 * dml_ceil(BytePerPixelDETC, 2)) in CalculatePrefetchSchedule()
765 * dml_ceil( in CalculatePrefetchSchedule()
770 * dml_ceil( in CalculatePrefetchSchedule()
809 return VCOSpeed * 4 / dml_ceil(VCOSpeed * 4 / Clock, 1); in RoundToDFSGranularityDown()
832 *MaxNumSwath = dml_ceil((*VInitPreFill - 1.0) / SwathHeight, 1) + 1.0; in CalculatePrefetchSourceLines()
847 *MaxNumSwath = dml_ceil(*VInitPreFill / SwathHeight, 1); in CalculatePrefetchSourceLines()
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Ddisplay_mode_vba_20v2.c503 …DataFabricLineDeliveryTimeLuma = SwathWidthSingleDPPY * SwathHeightY * dml_ceil(BytePerPixelDETY, … in CalculateDelayAfterScaler()
507 …DataFabricLineDeliveryTimeChroma = SwathWidthSingleDPPY / 2 * SwathHeightC * dml_ceil(BytePerPixel… in CalculateDelayAfterScaler()
609 *VUpdateOffsetPix = dml_ceil(HTotal / 4.0, 1); in CalculatePrefetchSchedule()
661 + PrefetchSourceLinesY * SwathWidthY * dml_ceil(BytePerPixelDETY, 1) in CalculatePrefetchSchedule()
662 + PrefetchSourceLinesC * SwathWidthY / 2 * dml_ceil(BytePerPixelDETC, 2)) in CalculatePrefetchSchedule()
717 + PrefetchSourceLinesY * SwathWidthY * dml_ceil(BytePerPixelDETY, 1) in CalculatePrefetchSchedule()
719 * dml_ceil(BytePerPixelDETC, 2)) in CalculatePrefetchSchedule()
825 * dml_ceil( in CalculatePrefetchSchedule()
830 * dml_ceil( in CalculatePrefetchSchedule()
869 return VCOSpeed * 4 / dml_ceil(VCOSpeed * 4 / Clock, 1); in RoundToDFSGranularityDown()
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Ddisplay_rq_dlg_calc_20.c456 + dml_ceil((double) (log2_blk_bytes - 8) / 2.0, 1); in get_meta_and_pte_attr()
677 rq_dlg_param->dpte_groups_per_row_ub = dml_ceil((double) dpte_row_width_ub / dpte_group_width, in get_meta_and_pte_attr()
1623 cur_width_ub = dml_ceil((double) cur_src_width / (double) cur_req_width, 1) in calculate_ttu_cursor()
Ddisplay_rq_dlg_calc_20v2.c456 + dml_ceil((double) (log2_blk_bytes - 8) / 2.0, 1); in get_meta_and_pte_attr()
677 rq_dlg_param->dpte_groups_per_row_ub = dml_ceil((double) dpte_row_width_ub / dpte_group_width, in get_meta_and_pte_attr()
1624 cur_width_ub = dml_ceil((double) cur_src_width / (double) cur_req_width, 1) in calculate_ttu_cursor()
/linux-6.12.1/drivers/gpu/drm/amd/display/dc/dml/dcn30/
Ddisplay_mode_vba_30.c990 Tvm_trips_rounded = dml_ceil(4.0 * Tvm_trips / LineTime, 1) / 4 * LineTime; in CalculatePrefetchSchedule()
991 Tr0_trips_rounded = dml_ceil(4.0 * Tr0_trips / LineTime, 1) / 4 * LineTime; in CalculatePrefetchSchedule()
1025 Tvm_oto_lines = dml_ceil(4.0 * Tvm_oto / LineTime, 1) / 4.0; in CalculatePrefetchSchedule()
1026 Tr0_oto_lines = dml_ceil(4.0 * Tr0_oto / LineTime, 1) / 4.0; in CalculatePrefetchSchedule()
1188 …*DestinationLinesToRequestVMInVBlank = dml_ceil(4.0 * TimeForFetchingMetaPTE / LineTime, 1.0) / 4.… in CalculatePrefetchSchedule()
1190 …*DestinationLinesToRequestRowInVBlank = dml_ceil(4.0 * TimeForFetchingRowInVBlank / LineTime, 1.0)… in CalculatePrefetchSchedule()
1305 return VCOSpeed * 4 / dml_ceil(VCOSpeed * 4.0 / Clock, 1); in RoundToDFSGranularityDown()
1447 full_swath_bytes_horz_wc_l = dml_ceil(full_swath_bytes_horz_wc_l * 2 / 3, 256); in CalculateDCCConfiguration()
1448 full_swath_bytes_horz_wc_c = dml_ceil(full_swath_bytes_horz_wc_c * 2 / 3, 256); in CalculateDCCConfiguration()
1449 full_swath_bytes_vert_wc_l = dml_ceil(full_swath_bytes_vert_wc_l * 2 / 3, 256); in CalculateDCCConfiguration()
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Ddisplay_rq_dlg_calc_30.c405 + dml_ceil((double)(log2_blk_bytes - 8) / 2.0, 1); in get_meta_and_pte_attr()
651 rq_dlg_param->dpte_groups_per_row_ub = dml_ceil((double)dpte_row_width_ub / dpte_group_width, in get_meta_and_pte_attr()
839 cur_width_ub = dml_ceil((double)cur_src_width / (double)cur_req_width, 1) in calculate_ttu_cursor()
/linux-6.12.1/drivers/gpu/drm/amd/display/dc/dml/dcn31/
Ddisplay_mode_vba_31.c1025 Tvm_trips_rounded = dml_ceil(4.0 * Tvm_trips / LineTime, 1) / 4 * LineTime;
1026 Tr0_trips_rounded = dml_ceil(4.0 * Tr0_trips / LineTime, 1) / 4 * LineTime;
1064 Lsw_oto = dml_ceil(4 * dml_max(prefetch_sw_bytes / prefetch_bw_oto / LineTime, min_Lsw), 1) / 4;
1104 Tvm_oto_lines = dml_ceil(4.0 * Tvm_oto / LineTime, 1) / 4.0;
1105 Tr0_oto_lines = dml_ceil(4.0 * Tr0_oto / LineTime, 1) / 4.0;
1280 …*DestinationLinesToRequestVMInVBlank = dml_ceil(4.0 * TimeForFetchingMetaPTE / LineTime, 1.0) / 4.…
1282 …*DestinationLinesToRequestRowInVBlank = dml_ceil(4.0 * TimeForFetchingRowInVBlank / LineTime, 1.0)…
1469 return VCOSpeed * 4 / dml_ceil(VCOSpeed * 4.0 / Clock, 1);
1590 full_swath_bytes_horz_wc_l = dml_ceil(full_swath_bytes_horz_wc_l * 2 / 3, 256);
1591 full_swath_bytes_horz_wc_c = dml_ceil(full_swath_bytes_horz_wc_c * 2 / 3, 256);
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Ddisplay_rq_dlg_calc_31.c425 log2_blk_height = log2_blk256_height + dml_ceil((double) (log2_blk_bytes - 8) / 2.0, 1); in get_meta_and_pte_attr()
646 rq_dlg_param->dpte_groups_per_row_ub = dml_ceil((double) dpte_row_width_ub / dpte_group_width, 1); in get_meta_and_pte_attr()
820 …cur_width_ub = dml_ceil((double) cur_src_width / (double) cur_req_width, 1) * (double) cur_req_wid… in calculate_ttu_cursor()
/linux-6.12.1/drivers/gpu/drm/amd/display/dc/dml/dcn314/
Ddisplay_mode_vba_314.c1043 Tvm_trips_rounded = dml_ceil(4.0 * Tvm_trips / LineTime, 1) / 4 * LineTime;
1044 Tr0_trips_rounded = dml_ceil(4.0 * Tr0_trips / LineTime, 1) / 4 * LineTime;
1082 Lsw_oto = dml_ceil(4 * dml_max(prefetch_sw_bytes / prefetch_bw_oto / LineTime, min_Lsw), 1) / 4;
1122 Tvm_oto_lines = dml_ceil(4.0 * Tvm_oto / LineTime, 1) / 4.0;
1123 Tr0_oto_lines = dml_ceil(4.0 * Tr0_oto / LineTime, 1) / 4.0;
1298 …*DestinationLinesToRequestVMInVBlank = dml_ceil(4.0 * TimeForFetchingMetaPTE / LineTime, 1.0) / 4.…
1300 …*DestinationLinesToRequestRowInVBlank = dml_ceil(4.0 * TimeForFetchingRowInVBlank / LineTime, 1.0)…
1486 return VCOSpeed * 4 / dml_ceil(VCOSpeed * 4.0 / Clock, 1);
1607 full_swath_bytes_horz_wc_l = dml_ceil(full_swath_bytes_horz_wc_l * 2 / 3, 256);
1608 full_swath_bytes_horz_wc_c = dml_ceil(full_swath_bytes_horz_wc_c * 2 / 3, 256);
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Ddcn314_fpu.c291 num_lines = dml_ceil(1000.0 * num_us / lines_time_in_ns, 1.0); in micro_sec_to_vert_lines()
Ddisplay_rq_dlg_calc_314.c513 log2_blk_height = log2_blk256_height + dml_ceil((double) (log2_blk_bytes - 8) / 2.0, 1); in get_meta_and_pte_attr()
734 rq_dlg_param->dpte_groups_per_row_ub = dml_ceil((double) dpte_row_width_ub / dpte_group_width, 1); in get_meta_and_pte_attr()
907 …cur_width_ub = dml_ceil((double) cur_src_width / (double) cur_req_width, 1) * (double) cur_req_wid… in calculate_ttu_cursor()
/linux-6.12.1/drivers/gpu/drm/amd/display/dc/dml/
Ddisplay_mode_vba.c1131 dml_ceil(WritebackLumaHTaps / 4.0, 1) / WritebackHRatio, in CalculateWriteBackDISPCLK()
1132 …dml_max((WritebackLumaVTaps * dml_ceil(1.0 / WritebackVRatio, 1) * dml_ceil(WritebackDestinationWi… in CalculateWriteBackDISPCLK()
1133 …+ dml_ceil(WritebackDestinationWidth / 4.0, 1)) / (double) HTotal + dml_ceil(1.0 / WritebackVRatio… in CalculateWriteBackDISPCLK()
1134 * (dml_ceil(WritebackLumaVTaps / 4.0, 1) + 4.0) / (double) HTotal, in CalculateWriteBackDISPCLK()
1135 dml_ceil(1.0 / WritebackVRatio, 1) * WritebackDestinationWidth / (double) HTotal)); in CalculateWriteBackDISPCLK()
1138 dml_ceil(WritebackChromaHTaps / 2.0, 1) / (2 * WritebackHRatio), in CalculateWriteBackDISPCLK()
1139 …dml_max((WritebackChromaVTaps * dml_ceil(1 / (2 * WritebackVRatio), 1) * dml_ceil(WritebackDestina… in CalculateWriteBackDISPCLK()
1140 + dml_ceil(WritebackDestinationWidth / 2.0 / WritebackChromaLineBufferWidth, 1)) / HTotal in CalculateWriteBackDISPCLK()
1141 … + dml_ceil(1 / (2 * WritebackVRatio), 1) * (dml_ceil(WritebackChromaVTaps / 4.0, 1) + 4) / HTotal, in CalculateWriteBackDISPCLK()
1142 dml_ceil(1.0 / (2 * WritebackVRatio), 1) * WritebackDestinationWidth / 2.0 / HTotal))); in CalculateWriteBackDISPCLK()
Ddml_inline_defs.h67 static inline double dml_ceil(double a, double granularity) in dml_ceil() function
Ddml1_display_rq_dlg_calc.c185 …*max_num_sw = (unsigned int) (dml_ceil((prefill - 1.0) / (double) swath_height, 1) + 1.0); /* pref… in get_swath_need()
447 + dml_ceil((double) (log2_blk_bytes - 8) / 2.0, 1); in dml1_rq_dlg_get_row_heights()
687 + dml_ceil((double) (log2_blk_bytes - 8) / 2.0, 1); in get_surf_rq_param()
923 rq_dlg_param->dpte_groups_per_row_ub = dml_ceil( in get_surf_rq_param()
1846 cur0_width_ub = dml_ceil((double) cur0_src_width / (double) cur0_req_width, 1) in dml1_rq_dlg_get_dlg_params()
/linux-6.12.1/drivers/gpu/drm/amd/display/dc/dml2/
Ddisplay_mode_core.c1156 s->Tvm_trips_rounded = dml_ceil(4.0 * s->Tvm_trips / s->LineTime, 1.0) / 4.0 * s->LineTime; in CalculatePrefetchSchedule()
1157 s->Tr0_trips_rounded = dml_ceil(4.0 * s->Tr0_trips / s->LineTime, 1.0) / 4.0 * s->LineTime; in CalculatePrefetchSchedule()
1161 …s->Tr0_trips_rounded = dml_ceil(4.0 * p->UrgentExtraLatency / s->LineTime, 1.0) / 4.0 * s->LineTim… in CalculatePrefetchSchedule()
1168 s->Tr0_trips_rounded = dml_ceil(4.0 * s->Tr0_trips / s->LineTime, 1.0) / 4.0 * s->LineTime; in CalculatePrefetchSchedule()
1195 …s->Lsw_oto = dml_ceil(4.0 * dml_max(s->prefetch_sw_bytes / s->prefetch_bw_oto / s->LineTime, s->mi… in CalculatePrefetchSchedule()
1220 s->Tvm_oto_lines = dml_ceil(4.0 * s->Tvm_oto / s->LineTime, 1) / 4.0; in CalculatePrefetchSchedule()
1221 s->Tr0_oto_lines = dml_ceil(4.0 * s->Tr0_oto / s->LineTime, 1) / 4.0; in CalculatePrefetchSchedule()
1414 …*p->DestinationLinesToRequestVMInVBlank = dml_ceil(4.0 * s->TimeForFetchingMetaPTE / s->LineTime, … in CalculatePrefetchSchedule()
1415 …*p->DestinationLinesToRequestRowInVBlank = dml_ceil(4.0 * s->TimeForFetchingRowInVBlank / s->LineT… in CalculatePrefetchSchedule()
1425 …*p->DestinationLinesToRequestVMInVBlank = dml_ceil(4.0 * s->TimeForFetchingMetaPTE / s->LineTime, … in CalculatePrefetchSchedule()
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Ddisplay_mode_util.h38 __DML_DLL_EXPORT__ dml_float_t dml_ceil(dml_float_t x, dml_float_t granularity);
Ddisplay_mode_util.c108 dml_float_t dml_ceil(dml_float_t x, dml_float_t granularity) in dml_ceil() function
186 double ceil = dml_ceil(val, 1); in dml_round()
/linux-6.12.1/drivers/gpu/drm/amd/display/dc/dml/dcn35/
Ddcn35_fpu.c419 num_lines = dml_ceil(1000.0 * num_us / lines_time_in_ns, 1.0); in micro_sec_to_vert_lines()
/linux-6.12.1/drivers/gpu/drm/amd/display/dc/dml/dcn351/
Ddcn351_fpu.c453 num_lines = dml_ceil(1000.0 * num_us / lines_time_in_ns, 1.0); in micro_sec_to_vert_lines()