Searched refs:dml2_core_internal_bw_sdp (Results 1 – 5 of 5) sorted by relevance
442 …avg_bandwidth_required[dml2_core_internal_soc_state_sys_active][dml2_core_internal_bw_sdp] * 1000)… in core_dcn4_mode_support()443 …andwidth_required_flip[dml2_core_internal_soc_state_sys_active][dml2_core_internal_bw_sdp] * 1000)… in core_dcn4_mode_support()444 …g_bandwidth_required[dml2_core_internal_soc_state_svp_prefetch][dml2_core_internal_bw_sdp] * 1000)… in core_dcn4_mode_support()445 …dwidth_required_flip[dml2_core_internal_soc_state_svp_prefetch][dml2_core_internal_bw_sdp] * 1000)… in core_dcn4_mode_support()
2728 …andwidth_required_flip[dml2_core_internal_soc_state_sys_active][dml2_core_internal_bw_sdp]) >= mod… in dml2_core_shared_mode_support()3181 case (dml2_core_internal_bw_sdp): in dml2_core_internal_bw_type_str()5412 if (bw_type == dml2_core_internal_bw_sdp) in dml_get_return_bandwidth_available()5482 …h_available[m][dml2_core_internal_bw_dram], avg_bandwidth_available[m][dml2_core_internal_bw_sdp]); in calculate_bandwidth_available()5483 …h_available[m][dml2_core_internal_bw_dram], urg_bandwidth_available[m][dml2_core_internal_bw_sdp]); in calculate_bandwidth_available()5535 …avg_bandwidth_required[dml2_core_internal_soc_state_sys_active][dml2_core_internal_bw_sdp] += sdp_… in calculate_avg_bandwidth_required()5538 …avg_bandwidth_required[dml2_core_internal_soc_state_svp_prefetch][dml2_core_internal_bw_sdp] += sd… in calculate_avg_bandwidth_required()5542 …ernal_bw_type_str(dml2_core_internal_bw_sdp), avg_bandwidth_required[dml2_core_internal_soc_state_… in calculate_avg_bandwidth_required()5544 …rnal_bw_type_str(dml2_core_internal_bw_sdp), avg_bandwidth_required[dml2_core_internal_soc_state_s… in calculate_avg_bandwidth_required()8389 …tate_sys_active][dml2_core_internal_bw_sdp] / urg_bandwidth_available[dml2_core_internal_soc_state… in check_urgent_bandwidth_support()[all …]
18 case (dml2_core_internal_bw_sdp): in dml2_core_internal_bw_type_str()337 …upport.avg_bandwidth_required[dml2_core_internal_soc_state_sys_active][dml2_core_internal_bw_sdp]);340 …port.avg_bandwidth_required[dml2_core_internal_soc_state_svp_prefetch][dml2_core_internal_bw_sdp]);343 …b->mp.avg_bandwidth_available[dml2_core_internal_soc_state_sys_active][dml2_core_internal_bw_sdp]);346 …>mp.avg_bandwidth_available[dml2_core_internal_soc_state_svp_prefetch][dml2_core_internal_bw_sdp]);349 …b->mp.urg_bandwidth_available[dml2_core_internal_soc_state_sys_active][dml2_core_internal_bw_sdp]);353 …>mp.urg_bandwidth_available[dml2_core_internal_soc_state_svp_prefetch][dml2_core_internal_bw_sdp]);361 …ib->mp.urg_bandwidth_required[dml2_core_internal_soc_state_sys_active][dml2_core_internal_bw_sdp]);363 …->mp.urg_bandwidth_required[dml2_core_internal_soc_state_svp_prefetch][dml2_core_internal_bw_sdp]);366 …mp.non_urg_bandwidth_required[dml2_core_internal_soc_state_sys_active][dml2_core_internal_bw_sdp]);[all …]
17 case (dml2_core_internal_bw_sdp): in dml2_core_utils_internal_bw_type_str()
155 dml2_core_internal_bw_sdp = 0, enumerator